module __float64__sub(
  input wire [63:0] x,
  input wire [63:0] y,
  output wire [63:0] out
);
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [1:0] priority_sel_2b_2way (input reg [1:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_2b_2way = case0;
        end
        2'b10: begin
          priority_sel_2b_2way = case1;
        end
        2'b00: begin
          priority_sel_2b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_2way = 2'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_4way (input reg [3:0] sel, input reg case0, input reg case1, input reg case2, input reg case3, input reg default_value);
    begin
      casez (sel)
        4'b???1: begin
          priority_sel_1b_4way = case0;
        end
        4'b??10: begin
          priority_sel_1b_4way = case1;
        end
        4'b?100: begin
          priority_sel_1b_4way = case2;
        end
        4'b1000: begin
          priority_sel_1b_4way = case3;
        end
        4'b0000: begin
          priority_sel_1b_4way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_4way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [2:0] priority_sel_3b_2way (input reg [1:0] sel, input reg [2:0] case0, input reg [2:0] case1, input reg [2:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_3b_2way = case0;
        end
        2'b10: begin
          priority_sel_3b_2way = case1;
        end
        2'b00: begin
          priority_sel_3b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_3b_2way = 3'dx;
        end
      endcase
    end
  endfunction
  function automatic [3:0] priority_sel_4b_2way (input reg [1:0] sel, input reg [3:0] case0, input reg [3:0] case1, input reg [3:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_4b_2way = case0;
        end
        2'b10: begin
          priority_sel_4b_2way = case1;
        end
        2'b00: begin
          priority_sel_4b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_4b_2way = 4'dx;
        end
      endcase
    end
  endfunction
  function automatic [4:0] priority_sel_5b_2way (input reg [1:0] sel, input reg [4:0] case0, input reg [4:0] case1, input reg [4:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_5b_2way = case0;
        end
        2'b10: begin
          priority_sel_5b_2way = case1;
        end
        2'b00: begin
          priority_sel_5b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_5b_2way = 5'dx;
        end
      endcase
    end
  endfunction
  wire [10:0] y_bexp__2;
  wire [10:0] x_bexp__2;
  wire [10:0] y__1_bexpnot__1;
  wire [11:0] x_bexp_extended__2;
  wire [11:0] y__1_bexpnot_extended__1;
  wire [11:0] full_result;
  wire overflow_detected;
  wire [51:0] y_fraction__2;
  wire [51:0] tuple_index_33623;
  wire [10:0] x_bexp__3;
  wire [10:0] y_bexp__3;
  wire [51:0] x_fraction__1;
  wire [51:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [52:0] fraction_x;
  wire [52:0] fraction_y;
  wire [52:0] sign_ext_33637;
  wire [10:0] narrowed_result;
  wire [10:0] x_bexpor_mask__1;
  wire tuple_index_33642;
  wire [52:0] fraction_x__1;
  wire [52:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [10:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [53:0] wide_x_squeezed;
  wire [55:0] wide_y_shift_bits;
  wire [10:0] shift;
  wire [55:0] shrl_33656;
  wire [56:0] shll_33658;
  wire [53:0] xddend_x__2_squeezed;
  wire [54:0] add_33669;
  wire sticky;
  wire [56:0] concat_33675;
  wire [56:0] xbs_fraction__1;
  wire nor_33688;
  wire nor_33694;
  wire and_33719;
  wire nor_33721;
  wire carry_bit;
  wire and_33729;
  wire nor_33731;
  wire and_33770;
  wire nor_33771;
  wire nor_33773;
  wire and_33780;
  wire nor_33781;
  wire nor_33783;
  wire nor_33757;
  wire nor_33758;
  wire nor_33763;
  wire nor_33764;
  wire nor_33753;
  wire nor_33754;
  wire nor_33744;
  wire nor_33745;
  wire nor_33814;
  wire nor_33815;
  wire and_33817;
  wire nor_33818;
  wire nor_33825;
  wire nor_33826;
  wire and_33828;
  wire nor_33829;
  wire and_33805;
  wire nor_33807;
  wire and_33810;
  wire nor_33811;
  wire and_33802;
  wire nor_33803;
  wire nor_33797;
  wire nor_33799;
  wire and_33793;
  wire nor_33794;
  wire nor_33788;
  wire nor_33790;
  wire and_33858;
  wire and_33859;
  wire and_33861;
  wire and_33862;
  wire and_33870;
  wire and_33871;
  wire and_33873;
  wire and_33874;
  wire and_33894;
  wire nor_33896;
  wire priority_sel_33904;
  wire and_33906;
  wire nor_33908;
  wire priority_sel_33916;
  wire and_33891;
  wire [1:0] priority_sel_33892;
  wire and_33887;
  wire and_33883;
  wire [2:0] concat_33939;
  wire [2:0] concat_33951;
  wire [2:0] concat_33927;
  wire [2:0] concat_33924;
  wire [2:0] concat_33923;
  wire [2:0] concat_33921;
  wire [2:0] concat_33920;
  wire and_33960;
  wire and_33966;
  wire and_33957;
  wire [2:0] fraction_shift__3;
  wire and_33987;
  wire [3:0] priority_sel_33988;
  wire [3:0] priority_sel_33989;
  wire [3:0] sel_34101;
  wire [4:0] concat_33991;
  wire [5:0] leading_zeroes;
  wire [57:0] cancel_fraction;
  wire [55:0] cancel_fraction__1;
  wire [55:0] carry_fraction__1;
  wire [55:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [53:0] add_34019;
  wire rounding_carry;
  wire [11:0] add_34032;
  wire [6:0] sub_34033;
  wire fraction_is_zero;
  wire [12:0] wide_exponent_associative_element;
  wire [12:0] wide_exponent_associative_element__1;
  wire [12:0] wide_exponent;
  wire [12:0] wide_exponent__1;
  wire [10:0] MAX_EXPONENT;
  wire [11:0] wide_exponent__2;
  wire eq_34048;
  wire eq_34049;
  wire eq_34050;
  wire eq_34051;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_34069;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [56:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [56:0] shrl_34082;
  wire is_result_nan;
  wire result_sign;
  wire [51:0] result_fraction;
  wire [51:0] sign_ext_34088;
  wire result_sign__1;
  wire [51:0] result_fraction__3;
  wire [51:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [10:0] result_exponent__2;
  wire [51:0] result_fraction__4;
  assign y_bexp__2 = y[62:52];
  assign x_bexp__2 = x[62:52];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {1'h0, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {1'h0, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[11];
  assign y_fraction__2 = y[51:0];
  assign tuple_index_33623 = x[51:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign x_fraction__1 = overflow_detected ? tuple_index_33623 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_33623;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[63:63];
  assign fraction_x = {1'h1, x_fraction__1};
  assign fraction_y = {1'h1, y_fraction__3};
  assign sign_ext_33637 = {53{y_bexp__3 != 11'h000}};
  assign narrowed_result = full_result[10:0];
  assign x_bexpor_mask__1 = {11{nc}};
  assign tuple_index_33642 = x[63:63];
  assign fraction_x__1 = fraction_x & {53{x_bexp__3 != 11'h000}};
  assign fraction_y__1 = fraction_y & sign_ext_33637;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_33642 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_33642;
  assign wide_x_squeezed = {1'h0, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {10'h000, overflow_detected};
  assign shrl_33656 = shift >= 11'h038 ? 56'h00_0000_0000_0000 : wide_y_shift_bits >> shift;
  assign shll_33658 = shift >= 11'h039 ? 57'h000_0000_0000_0000 : 57'h1ff_ffff_ffff_ffff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign add_33669 = {{1{xddend_x__2_squeezed[53]}}, xddend_x__2_squeezed} + {2'h0, shrl_33656[55:3]};
  assign sticky = ~({1'h0, ~y_fraction__3} | ~sign_ext_33637 | shll_33658[55:3]) != 53'h00_0000_0000_0000;
  assign concat_33675 = {add_33669[53:0], shrl_33656[2:1], shrl_33656[0] | sticky};
  assign xbs_fraction__1 = add_33669[54] ? -concat_33675 : concat_33675;
  assign nor_33688 = ~(xbs_fraction__1[46] | xbs_fraction__1[45]);
  assign nor_33694 = ~(xbs_fraction__1[30] | xbs_fraction__1[29]);
  assign and_33719 = ~(xbs_fraction__1[48] | xbs_fraction__1[47]) & nor_33688;
  assign nor_33721 = ~(xbs_fraction__1[42] | xbs_fraction__1[41]);
  assign carry_bit = xbs_fraction__1[56];
  assign and_33729 = ~(xbs_fraction__1[32] | xbs_fraction__1[31]) & nor_33694;
  assign nor_33731 = ~(xbs_fraction__1[26] | xbs_fraction__1[25]);
  assign and_33770 = ~(xbs_fraction__1[44] | xbs_fraction__1[43]) & nor_33721;
  assign nor_33771 = ~(xbs_fraction__1[44] | xbs_fraction__1[43] | nor_33721);
  assign nor_33773 = ~(xbs_fraction__1[54] | xbs_fraction__1[53]);
  assign and_33780 = ~(xbs_fraction__1[28] | xbs_fraction__1[27]) & nor_33731;
  assign nor_33781 = ~(xbs_fraction__1[28] | xbs_fraction__1[27] | nor_33731);
  assign nor_33783 = ~(xbs_fraction__1[38] | xbs_fraction__1[37]);
  assign nor_33757 = ~(xbs_fraction__1[24] | xbs_fraction__1[23]);
  assign nor_33758 = ~(xbs_fraction__1[22] | xbs_fraction__1[21]);
  assign nor_33763 = ~(xbs_fraction__1[18] | xbs_fraction__1[17]);
  assign nor_33764 = ~(xbs_fraction__1[20] | xbs_fraction__1[19]);
  assign nor_33753 = ~(xbs_fraction__1[14] | xbs_fraction__1[13]);
  assign nor_33754 = ~(xbs_fraction__1[16] | xbs_fraction__1[15]);
  assign nor_33744 = ~(xbs_fraction__1[6] | xbs_fraction__1[5]);
  assign nor_33745 = ~(xbs_fraction__1[8] | xbs_fraction__1[7]);
  assign nor_33814 = ~(xbs_fraction__1[50] | xbs_fraction__1[49]);
  assign nor_33815 = ~(~and_33719 | and_33770);
  assign and_33817 = ~(carry_bit | xbs_fraction__1[55]) & nor_33773;
  assign nor_33818 = ~(carry_bit | xbs_fraction__1[55] | nor_33773);
  assign nor_33825 = ~(xbs_fraction__1[34] | xbs_fraction__1[33]);
  assign nor_33826 = ~(~and_33729 | and_33780);
  assign and_33828 = ~(xbs_fraction__1[40] | xbs_fraction__1[39]) & nor_33783;
  assign nor_33829 = ~(xbs_fraction__1[40] | xbs_fraction__1[39] | nor_33783);
  assign and_33805 = nor_33757 & nor_33758;
  assign nor_33807 = ~(xbs_fraction__1[24] | ~xbs_fraction__1[23]);
  assign and_33810 = nor_33764 & nor_33763;
  assign nor_33811 = ~(xbs_fraction__1[20] | ~xbs_fraction__1[19]);
  assign and_33802 = nor_33754 & nor_33753;
  assign nor_33803 = ~(xbs_fraction__1[16] | ~xbs_fraction__1[15]);
  assign nor_33797 = ~(xbs_fraction__1[10] | xbs_fraction__1[9]);
  assign nor_33799 = ~(xbs_fraction__1[12] | xbs_fraction__1[11]);
  assign and_33793 = nor_33745 & nor_33744;
  assign nor_33794 = ~(xbs_fraction__1[8] | ~xbs_fraction__1[7]);
  assign nor_33788 = ~(xbs_fraction__1[2] | xbs_fraction__1[1]);
  assign nor_33790 = ~(xbs_fraction__1[4] | xbs_fraction__1[3]);
  assign and_33858 = ~(xbs_fraction__1[52] | xbs_fraction__1[51]) & nor_33814;
  assign and_33859 = and_33719 & and_33770;
  assign and_33861 = nor_33815 & ~nor_33771;
  assign and_33862 = nor_33815 & nor_33771;
  assign and_33870 = ~(xbs_fraction__1[36] | xbs_fraction__1[35]) & nor_33825;
  assign and_33871 = and_33729 & and_33780;
  assign and_33873 = nor_33826 & ~nor_33781;
  assign and_33874 = nor_33826 & nor_33781;
  assign and_33894 = and_33817 & and_33858;
  assign nor_33896 = ~(xbs_fraction__1[48] | xbs_fraction__1[47] | nor_33688);
  assign priority_sel_33904 = priority_sel_1b_2way({nor_33818, and_33817}, 1'h0, ~(xbs_fraction__1[54] | ~xbs_fraction__1[53]), ~(carry_bit | ~xbs_fraction__1[55]));
  assign and_33906 = and_33828 & and_33870;
  assign nor_33908 = ~(xbs_fraction__1[32] | xbs_fraction__1[31] | nor_33694);
  assign priority_sel_33916 = priority_sel_1b_2way({nor_33829, and_33828}, 1'h0, ~(xbs_fraction__1[38] | ~xbs_fraction__1[37]), ~(xbs_fraction__1[40] | ~xbs_fraction__1[39]));
  assign and_33891 = and_33805 & and_33810;
  assign priority_sel_33892 = priority_sel_2b_2way({~(xbs_fraction__1[24] | xbs_fraction__1[23] | nor_33758), and_33805}, {nor_33807, 1'h0}, {1'h1, ~(xbs_fraction__1[22] | ~xbs_fraction__1[21])}, {nor_33757, nor_33807});
  assign and_33887 = nor_33799 & nor_33797;
  assign and_33883 = nor_33790 & nor_33788;
  assign concat_33939 = {1'h1, ~(xbs_fraction__1[52] | xbs_fraction__1[51] | nor_33814) ? {1'h1, ~(xbs_fraction__1[50] | ~xbs_fraction__1[49])} : {1'h0, ~(xbs_fraction__1[52] | ~xbs_fraction__1[51])}};
  assign concat_33951 = {1'h1, ~(xbs_fraction__1[36] | xbs_fraction__1[35] | nor_33825) ? {1'h1, ~(xbs_fraction__1[34] | ~xbs_fraction__1[33])} : {1'h0, ~(xbs_fraction__1[36] | ~xbs_fraction__1[35])}};
  assign concat_33927 = {1'h1, priority_sel_2b_2way({~(xbs_fraction__1[20] | xbs_fraction__1[19] | nor_33763), and_33810}, {nor_33811, 1'h0}, {1'h1, ~(xbs_fraction__1[18] | ~xbs_fraction__1[17])}, {nor_33764, nor_33811})};
  assign concat_33924 = {and_33802, priority_sel_2b_2way({~(xbs_fraction__1[16] | xbs_fraction__1[15] | nor_33753), and_33802}, {nor_33803, 1'h0}, {1'h1, ~(xbs_fraction__1[14] | ~xbs_fraction__1[13])}, {nor_33754, nor_33803})};
  assign concat_33923 = {1'h1, ~(xbs_fraction__1[12] | xbs_fraction__1[11] | nor_33797) ? {1'h1, ~(xbs_fraction__1[10] | ~xbs_fraction__1[9])} : {nor_33799, ~(xbs_fraction__1[12] | ~xbs_fraction__1[11])}};
  assign concat_33921 = {and_33793, priority_sel_2b_2way({~(xbs_fraction__1[8] | xbs_fraction__1[7] | nor_33744), and_33793}, {nor_33794, 1'h0}, {1'h1, ~(xbs_fraction__1[6] | ~xbs_fraction__1[5])}, {nor_33745, nor_33794})};
  assign concat_33920 = {1'h1, ~(xbs_fraction__1[4] | xbs_fraction__1[3] | nor_33788) ? {1'h1, ~(xbs_fraction__1[2] | ~xbs_fraction__1[1])} : {nor_33790, ~(xbs_fraction__1[4] | ~xbs_fraction__1[3])}};
  assign and_33960 = and_33894 & and_33859;
  assign and_33966 = and_33906 & and_33871;
  assign and_33957 = and_33802 & and_33887;
  assign fraction_shift__3 = 3'h4;
  assign and_33987 = and_33960 & and_33966;
  assign priority_sel_33988 = priority_sel_4b_2way({~(~and_33894 | and_33859), and_33960}, 4'h0, {1'h1, nor_33815, and_33862 & ~and_33859 | nor_33896 & ~and_33861 & ~and_33862 & ~and_33859, priority_sel_1b_4way({nor_33896, and_33861, and_33862, and_33859}, 1'h0, ~(xbs_fraction__1[42] | ~xbs_fraction__1[41]), ~(xbs_fraction__1[44] | ~xbs_fraction__1[43]), ~(xbs_fraction__1[46] | ~xbs_fraction__1[45]), ~(xbs_fraction__1[48] | ~xbs_fraction__1[47]))}, {and_33894, priority_sel_3b_2way({~(~and_33817 | and_33858), and_33894}, {nor_33818, priority_sel_33904, 1'h0}, concat_33939, {1'h0, nor_33818, priority_sel_33904})});
  assign priority_sel_33989 = priority_sel_4b_2way({~(~and_33906 | and_33871), and_33966}, 4'h0, {1'h1, nor_33826, and_33874 & ~and_33871 | nor_33908 & ~and_33873 & ~and_33874 & ~and_33871, priority_sel_1b_4way({nor_33908, and_33873, and_33874, and_33871}, 1'h0, ~(xbs_fraction__1[26] | ~xbs_fraction__1[25]), ~(xbs_fraction__1[28] | ~xbs_fraction__1[27]), ~(xbs_fraction__1[30] | ~xbs_fraction__1[29]), ~(xbs_fraction__1[32] | ~xbs_fraction__1[31]))}, {and_33906, priority_sel_3b_2way({~(~and_33828 | and_33870), and_33906}, {nor_33829, priority_sel_33916, 1'h0}, concat_33951, {1'h0, nor_33829, priority_sel_33916})});
  assign sel_34101 = ~(~and_33891 | and_33957) ? {1'h1, ~(~and_33802 | and_33887) ? concat_33923 : concat_33924} : {and_33891, priority_sel_3b_2way({~(~and_33805 | and_33810), and_33891}, {priority_sel_33892, 1'h0}, concat_33927, {and_33805, priority_sel_33892})};
  assign concat_33991 = {1'h1, and_33793 & and_33883 ? {fraction_shift__3, ~xbs_fraction__1[0]} : {1'h0, ~(~and_33793 | and_33883) ? concat_33920 : concat_33921}};
  assign leading_zeroes = and_33960 & and_33987 ? {1'h1, and_33891 & and_33957 ? concat_33991 : {1'h0, sel_34101}} : {1'h0, priority_sel_5b_2way({~(~and_33960 | and_33966), and_33987}, {priority_sel_33988, 1'h0}, {1'h1, priority_sel_33989}, {and_33960, priority_sel_33988})};
  assign cancel_fraction = leading_zeroes >= 6'h3a ? 58'h000_0000_0000_0000 : {1'h0, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[56:1];
  assign carry_fraction__1 = {xbs_fraction__1[56:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_34019 = {1'h0, shifted_fraction[55:3]} + {53'h00_0000_0000_0000, do_round_up};
  assign rounding_carry = add_34019[53];
  assign add_34032 = {1'h0, x_bexp__3} + 12'h001;
  assign sub_34033 = {6'h00, rounding_carry} - {1'h0, leading_zeroes};
  assign fraction_is_zero = add_33669 == 55'h00_0000_0000_0000 & ~(shrl_33656[1] | shrl_33656[2]) & ~(shrl_33656[0] | sticky);
  assign wide_exponent_associative_element = {1'h0, add_34032};
  assign wide_exponent_associative_element__1 = {{6{sub_34033[6]}}, sub_34033};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {13{~fraction_is_zero}};
  assign MAX_EXPONENT = 11'h7ff;
  assign wide_exponent__2 = wide_exponent__1[11:0] & {12{~wide_exponent__1[12]}};
  assign eq_34048 = x_bexp__3 == MAX_EXPONENT;
  assign eq_34049 = x_fraction__1 == 52'h0_0000_0000_0000;
  assign eq_34050 = y_bexp__3 == MAX_EXPONENT;
  assign eq_34051 = y_fraction__3 == 52'h0_0000_0000_0000;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_34048 & eq_34049 | eq_34050 & eq_34051;
  assign and_reduce_34069 = &wide_exponent__2[10:0];
  assign has_pos_inf = ~(~eq_34048 | ~eq_34049 | x_sign__1) | ~(~eq_34050 | ~eq_34051 | y_sign__3);
  assign has_neg_inf = eq_34048 & eq_34049 & x_sign__1 | eq_34050 & eq_34051 & y_sign__3;
  assign rounded_fraction = {add_34019, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_34082 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_34048 | eq_34049) | ~(~eq_34050 | eq_34051) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_33669[54], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_34082[51:0];
  assign sign_ext_34088 = {52{~(is_operand_inf | wide_exponent__2[11] | and_reduce_34069 | ~((|wide_exponent__2[11:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_34088;
  assign FRACTION_HIGH_BIT = 52'h8_0000_0000_0000;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[11] | and_reduce_34069 ? MAX_EXPONENT : wide_exponent__2[10:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule