module __hfloat16__from_float32(
  input wire [31:0] f32,
  output wire [15:0] out
);
  function automatic dynamic_bit_slice_w1_24b_32b (input reg [23:0] operand, input reg [31:0] start);
    reg [24:0] extended_operand;
    begin
      extended_operand = {1'h0, operand};
      dynamic_bit_slice_w1_24b_32b = start >= 5'h18 ? 1'h0 : extended_operand[start +: 1];
    end
  endfunction
  function automatic [9:0] dynamic_bit_slice_w10_11b_32b (input reg [10:0] operand, input reg [31:0] start);
    reg [20:0] extended_operand;
    begin
      extended_operand = {10'h000, operand};
      dynamic_bit_slice_w10_11b_32b = start >= 4'hb ? 10'h000 : extended_operand[start +: 10];
    end
  endfunction
  function automatic [4:0] priority_sel_5b_2way (input reg [1:0] sel, input reg [4:0] case0, input reg [4:0] case1, input reg [4:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_5b_2way = case0;
        end
        2'b10: begin
          priority_sel_5b_2way = case1;
        end
        2'b00: begin
          priority_sel_5b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_5b_2way = 5'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [7:0] f32_bexp__1;
  wire [3:0] add_2080;
  wire [7:0] neg_2083;
  wire [8:0] sign_ext_2084;
  wire [22:0] f32_fraction__1;
  wire [8:0] add_2087;
  wire [31:0] f32irst_lost_bit_idx__2;
  wire [7:0] add_2094;
  wire [8:0] concat_2099;
  wire [23:0] concat_2100;
  wire round_bit__1;
  wire sticky__1;
  wire [9:0] truncated_frac;
  wire [8:0] add_2111;
  wire [10:0] f32ull_frac__2;
  wire [31:0] right_shift_cnt;
  wire round_up__1;
  wire round_bit;
  wire sticky;
  wire [9:0] unrounded_subnormal_frac;
  wire [9:0] subnormal_frac;
  wire round_up;
  wire eq_2133;
  wire eq_2134;
  wire renormalize;
  wire ugt_2137;
  wire rounds_to_normal;
  wire [7:0] f32_cast_bexp__2;
  wire [7:0] INF_EXP;
  wire [7:0] uexp;
  wire [7:0] TO_BIAS;
  wire eq_2149;
  wire eq_2154;
  wire sgt_2155;
  wire [4:0] BIAS;
  wire eq_2161;
  wire eq_2162;
  wire sle_2163;
  wire [9:0] f32_cast_fraction__1;
  wire [4:0] add_2167;
  wire nor_2179;
  wire [9:0] and_2180;
  wire nor_2181;
  wire [4:0] x_bexp__1;
  wire f32_sign__2;
  wire [7:0] uexp__1;
  wire [9:0] concat_2204;
  wire and_2198;
  wire x_sign;
  wire nand_2207;
  wire nand_2208;
  wire nand_2209;
  assign f32_bexp__1 = f32[30:23];
  assign add_2080 = f32_bexp__1[7:4] + 4'h9;
  assign neg_2083 = -{add_2080, f32_bexp__1[3:0]};
  assign sign_ext_2084 = {{1{neg_2083[7]}}, neg_2083};
  assign f32_fraction__1 = f32[22:0];
  assign add_2087 = sign_ext_2084 + 9'h00d;
  assign f32irst_lost_bit_idx__2 = {{23{add_2087[8]}}, add_2087};
  assign add_2094 = sign_ext_2084[8:1] + 8'h07;
  assign concat_2099 = {add_2094, neg_2083[0]};
  assign concat_2100 = {1'h1, f32_fraction__1};
  assign round_bit__1 = dynamic_bit_slice_w1_24b_32b(concat_2100, f32irst_lost_bit_idx__2);
  assign sticky__1 = ~({1'h0, ~f32_fraction__1} | (f32irst_lost_bit_idx__2 >= 32'h0000_0018 ? 24'h00_0000 : 24'hff_ffff << f32irst_lost_bit_idx__2)) != 24'h00_0000;
  assign truncated_frac = f32_fraction__1[22:13];
  assign add_2111 = sign_ext_2084 + 9'h001;
  assign f32ull_frac__2 = {1'h1, truncated_frac};
  assign right_shift_cnt = {{23{add_2111[8]}}, add_2111};
  assign round_up__1 = round_bit__1 & sticky__1 | round_bit__1 & concat_2099 < 9'h018 & dynamic_bit_slice_w1_24b_32b(concat_2100, {{23{concat_2099[8]}}, concat_2099});
  assign round_bit = f32_fraction__1[12];
  assign sticky = f32_fraction__1[11:0] != 12'h000;
  assign unrounded_subnormal_frac = dynamic_bit_slice_w10_11b_32b(f32ull_frac__2, right_shift_cnt);
  assign subnormal_frac = unrounded_subnormal_frac + {9'h000, round_up__1};
  assign round_up = round_bit & sticky | round_bit & f32_fraction__1[13];
  assign eq_2133 = neg_2083 == 8'h00;
  assign eq_2134 = subnormal_frac == 10'h000;
  assign renormalize = round_up & (&truncated_frac);
  assign ugt_2137 = add_2111 > 9'h00b;
  assign rounds_to_normal = eq_2133 & eq_2134;
  assign f32_cast_bexp__2 = f32_bexp__1 + {7'h00, renormalize};
  assign INF_EXP = 8'hff;
  assign uexp = f32_cast_bexp__2 + 8'h81;
  assign TO_BIAS = 8'h0f;
  assign eq_2149 = f32_bexp__1 == 8'h00;
  assign eq_2154 = f32_cast_bexp__2 == INF_EXP;
  assign sgt_2155 = $signed(uexp) > $signed(TO_BIAS);
  assign BIAS = 5'h0f;
  assign eq_2161 = f32_fraction__1 == 23'h00_0000;
  assign eq_2162 = f32_bexp__1 == INF_EXP;
  assign sle_2163 = $signed(uexp) <= $signed(8'hf1);
  assign f32_cast_fraction__1 = truncated_frac + {9'h000, round_up};
  assign add_2167 = uexp[4:0] + BIAS;
  assign nor_2179 = ~(~eq_2162 | eq_2161);
  assign and_2180 = (sle_2163 ? subnormal_frac & {10{~(ugt_2137 | rounds_to_normal)}} : f32_cast_fraction__1) & {10{~(eq_2154 | sgt_2155)}};
  assign nor_2181 = ~(eq_2162 | eq_2149);
  assign x_bexp__1 = priority_sel_5b_2way({eq_2149, eq_2162}, 5'h1f, 5'h00, eq_2154 | sgt_2155 ? 5'h1f : (sle_2163 ? {4'h0, ~(ugt_2137 | ~eq_2133 | ~eq_2134)} : add_2167));
  assign f32_sign__2 = f32[31:31];
  assign uexp__1 = f32_bexp__1 + 8'h81;
  assign concat_2204 = {priority_sel_1b_2way({~(~eq_2149 | eq_2161) | eq_2149 & eq_2161 | eq_2162 & eq_2161, nor_2179}, 1'h1, 1'h0, and_2180[9]), and_2180[8:0] & {9{nor_2181}}};
  assign and_2198 = nor_2181 & ~eq_2154 & ~sgt_2155 & sle_2163;
  assign x_sign = ~(nor_2179 | ~f32_sign__2);
  assign nand_2207 = ~(and_2198 & $signed(uexp__1) >= $signed(8'hf2));
  assign nand_2208 = ~(and_2198 & ~ugt_2137 & neg_2083 == 8'hf2);
  assign nand_2209 = ~(and_2198 & ~ugt_2137 & concat_2099 > 9'h018);
  assign out = {x_sign, x_bexp__1, concat_2204 & {10{x_bexp__1 != 5'h00}}};
endmodule