module __float64__sub(
  input wire [63:0] x,
  input wire [63:0] y,
  output wire [63:0] out
);
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [1:0] priority_sel_2b_2way (input reg [1:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_2b_2way = case0;
        end
        2'b10: begin
          priority_sel_2b_2way = case1;
        end
        2'b00: begin
          priority_sel_2b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_2way = 2'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_4way (input reg [3:0] sel, input reg case0, input reg case1, input reg case2, input reg case3, input reg default_value);
    begin
      casez (sel)
        4'b???1: begin
          priority_sel_1b_4way = case0;
        end
        4'b??10: begin
          priority_sel_1b_4way = case1;
        end
        4'b?100: begin
          priority_sel_1b_4way = case2;
        end
        4'b1000: begin
          priority_sel_1b_4way = case3;
        end
        4'b0000: begin
          priority_sel_1b_4way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_4way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [2:0] priority_sel_3b_2way (input reg [1:0] sel, input reg [2:0] case0, input reg [2:0] case1, input reg [2:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_3b_2way = case0;
        end
        2'b10: begin
          priority_sel_3b_2way = case1;
        end
        2'b00: begin
          priority_sel_3b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_3b_2way = 3'dx;
        end
      endcase
    end
  endfunction
  function automatic [3:0] priority_sel_4b_2way (input reg [1:0] sel, input reg [3:0] case0, input reg [3:0] case1, input reg [3:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_4b_2way = case0;
        end
        2'b10: begin
          priority_sel_4b_2way = case1;
        end
        2'b00: begin
          priority_sel_4b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_4b_2way = 4'dx;
        end
      endcase
    end
  endfunction
  function automatic [4:0] priority_sel_5b_2way (input reg [1:0] sel, input reg [4:0] case0, input reg [4:0] case1, input reg [4:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_5b_2way = case0;
        end
        2'b10: begin
          priority_sel_5b_2way = case1;
        end
        2'b00: begin
          priority_sel_5b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_5b_2way = 5'dx;
        end
      endcase
    end
  endfunction
  wire [10:0] y_bexp__2;
  wire literal_31233;
  wire [10:0] x_bexp__2;
  wire [10:0] y__1_bexpnot__1;
  wire [11:0] x_bexp_extended__2;
  wire [11:0] y__1_bexpnot_extended__1;
  wire [11:0] full_result;
  wire overflow_detected;
  wire [51:0] y_fraction__2;
  wire [51:0] tuple_index_31241;
  wire [10:0] x_bexp__3;
  wire [10:0] literal_31243;
  wire [10:0] y_bexp__3;
  wire literal_31245;
  wire [51:0] x_fraction__1;
  wire [51:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [52:0] fraction_x;
  wire [52:0] fraction_y;
  wire [52:0] sign_ext_31255;
  wire [10:0] narrowed_result;
  wire [10:0] x_bexpor_mask__1;
  wire tuple_index_31260;
  wire [52:0] fraction_x__1;
  wire [52:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [10:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [53:0] wide_x_squeezed;
  wire [55:0] wide_y_shift_bits;
  wire [10:0] shift;
  wire [55:0] shrl_31274;
  wire [56:0] shll_31276;
  wire [53:0] xddend_x__2_squeezed;
  wire [52:0] literal_31286;
  wire [54:0] add_31287;
  wire sticky;
  wire [56:0] concat_31293;
  wire [56:0] xbs_fraction__1;
  wire nor_31306;
  wire nor_31312;
  wire and_31337;
  wire nor_31339;
  wire carry_bit;
  wire and_31347;
  wire nor_31349;
  wire and_31388;
  wire nor_31389;
  wire nor_31391;
  wire and_31398;
  wire nor_31399;
  wire nor_31401;
  wire nor_31375;
  wire nor_31376;
  wire nor_31381;
  wire nor_31382;
  wire nor_31371;
  wire nor_31372;
  wire nor_31362;
  wire nor_31363;
  wire nor_31432;
  wire nor_31433;
  wire and_31435;
  wire nor_31436;
  wire nor_31443;
  wire nor_31444;
  wire and_31446;
  wire nor_31447;
  wire and_31423;
  wire nor_31425;
  wire and_31428;
  wire nor_31429;
  wire and_31420;
  wire nor_31421;
  wire nor_31415;
  wire nor_31417;
  wire and_31411;
  wire nor_31412;
  wire nor_31406;
  wire nor_31408;
  wire and_31476;
  wire and_31477;
  wire and_31479;
  wire and_31480;
  wire and_31488;
  wire and_31489;
  wire and_31491;
  wire and_31492;
  wire and_31512;
  wire nor_31514;
  wire priority_sel_31522;
  wire and_31524;
  wire nor_31526;
  wire priority_sel_31534;
  wire and_31509;
  wire [1:0] priority_sel_31510;
  wire and_31505;
  wire and_31501;
  wire [2:0] concat_31557;
  wire [2:0] concat_31569;
  wire [2:0] concat_31545;
  wire [2:0] concat_31542;
  wire [2:0] concat_31541;
  wire [2:0] concat_31539;
  wire [2:0] concat_31538;
  wire and_31578;
  wire and_31584;
  wire and_31575;
  wire [2:0] fraction_shift__3;
  wire [3:0] literal_31596;
  wire and_31605;
  wire [3:0] priority_sel_31606;
  wire [3:0] priority_sel_31607;
  wire [3:0] sel_31719;
  wire [4:0] concat_31609;
  wire [5:0] leading_zeroes;
  wire [57:0] cancel_fraction;
  wire [55:0] cancel_fraction__1;
  wire [55:0] carry_fraction__1;
  wire [55:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [53:0] add_31637;
  wire rounding_carry;
  wire [11:0] add_31650;
  wire [6:0] sub_31651;
  wire fraction_is_zero;
  wire [12:0] wide_exponent_associative_element;
  wire [12:0] wide_exponent_associative_element__1;
  wire [12:0] wide_exponent;
  wire [12:0] wide_exponent__1;
  wire [10:0] MAX_EXPONENT;
  wire [51:0] literal_31664;
  wire [11:0] wide_exponent__2;
  wire eq_31666;
  wire eq_31667;
  wire eq_31668;
  wire eq_31669;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_31687;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [56:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [56:0] shrl_31700;
  wire is_result_nan;
  wire result_sign;
  wire [51:0] result_fraction;
  wire [51:0] sign_ext_31706;
  wire result_sign__1;
  wire [51:0] result_fraction__3;
  wire [51:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [10:0] result_exponent__2;
  wire [51:0] result_fraction__4;
  assign y_bexp__2 = y[62:52];
  assign literal_31233 = 1'h0;
  assign x_bexp__2 = x[62:52];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {literal_31233, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {literal_31233, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[11];
  assign y_fraction__2 = y[51:0];
  assign tuple_index_31241 = x[51:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign literal_31243 = 11'h000;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign literal_31245 = 1'h1;
  assign x_fraction__1 = overflow_detected ? tuple_index_31241 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_31241;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[63:63];
  assign fraction_x = {literal_31245, x_fraction__1};
  assign fraction_y = {literal_31245, y_fraction__3};
  assign sign_ext_31255 = {53{y_bexp__3 != literal_31243}};
  assign narrowed_result = full_result[10:0];
  assign x_bexpor_mask__1 = {11{nc}};
  assign tuple_index_31260 = x[63:63];
  assign fraction_x__1 = fraction_x & {53{x_bexp__3 != literal_31243}};
  assign fraction_y__1 = fraction_y & sign_ext_31255;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_31260 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_31260;
  assign wide_x_squeezed = {literal_31233, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {10'h000, overflow_detected};
  assign shrl_31274 = shift >= 11'h038 ? 56'h00_0000_0000_0000 : wide_y_shift_bits >> shift;
  assign shll_31276 = shift >= 11'h039 ? 57'h000_0000_0000_0000 : 57'h1ff_ffff_ffff_ffff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign literal_31286 = 53'h00_0000_0000_0000;
  assign add_31287 = {{1{xddend_x__2_squeezed[53]}}, xddend_x__2_squeezed} + {2'h0, shrl_31274[55:3]};
  assign sticky = ~({literal_31233, ~y_fraction__3} | ~sign_ext_31255 | shll_31276[55:3]) != literal_31286;
  assign concat_31293 = {add_31287[53:0], shrl_31274[2:1], shrl_31274[0] | sticky};
  assign xbs_fraction__1 = add_31287[54] ? -concat_31293 : concat_31293;
  assign nor_31306 = ~(xbs_fraction__1[46] | xbs_fraction__1[45]);
  assign nor_31312 = ~(xbs_fraction__1[30] | xbs_fraction__1[29]);
  assign and_31337 = ~(xbs_fraction__1[48] | xbs_fraction__1[47]) & nor_31306;
  assign nor_31339 = ~(xbs_fraction__1[42] | xbs_fraction__1[41]);
  assign carry_bit = xbs_fraction__1[56];
  assign and_31347 = ~(xbs_fraction__1[32] | xbs_fraction__1[31]) & nor_31312;
  assign nor_31349 = ~(xbs_fraction__1[26] | xbs_fraction__1[25]);
  assign and_31388 = ~(xbs_fraction__1[44] | xbs_fraction__1[43]) & nor_31339;
  assign nor_31389 = ~(xbs_fraction__1[44] | xbs_fraction__1[43] | nor_31339);
  assign nor_31391 = ~(xbs_fraction__1[54] | xbs_fraction__1[53]);
  assign and_31398 = ~(xbs_fraction__1[28] | xbs_fraction__1[27]) & nor_31349;
  assign nor_31399 = ~(xbs_fraction__1[28] | xbs_fraction__1[27] | nor_31349);
  assign nor_31401 = ~(xbs_fraction__1[38] | xbs_fraction__1[37]);
  assign nor_31375 = ~(xbs_fraction__1[24] | xbs_fraction__1[23]);
  assign nor_31376 = ~(xbs_fraction__1[22] | xbs_fraction__1[21]);
  assign nor_31381 = ~(xbs_fraction__1[18] | xbs_fraction__1[17]);
  assign nor_31382 = ~(xbs_fraction__1[20] | xbs_fraction__1[19]);
  assign nor_31371 = ~(xbs_fraction__1[14] | xbs_fraction__1[13]);
  assign nor_31372 = ~(xbs_fraction__1[16] | xbs_fraction__1[15]);
  assign nor_31362 = ~(xbs_fraction__1[6] | xbs_fraction__1[5]);
  assign nor_31363 = ~(xbs_fraction__1[8] | xbs_fraction__1[7]);
  assign nor_31432 = ~(xbs_fraction__1[50] | xbs_fraction__1[49]);
  assign nor_31433 = ~(~and_31337 | and_31388);
  assign and_31435 = ~(carry_bit | xbs_fraction__1[55]) & nor_31391;
  assign nor_31436 = ~(carry_bit | xbs_fraction__1[55] | nor_31391);
  assign nor_31443 = ~(xbs_fraction__1[34] | xbs_fraction__1[33]);
  assign nor_31444 = ~(~and_31347 | and_31398);
  assign and_31446 = ~(xbs_fraction__1[40] | xbs_fraction__1[39]) & nor_31401;
  assign nor_31447 = ~(xbs_fraction__1[40] | xbs_fraction__1[39] | nor_31401);
  assign and_31423 = nor_31375 & nor_31376;
  assign nor_31425 = ~(xbs_fraction__1[24] | ~xbs_fraction__1[23]);
  assign and_31428 = nor_31382 & nor_31381;
  assign nor_31429 = ~(xbs_fraction__1[20] | ~xbs_fraction__1[19]);
  assign and_31420 = nor_31372 & nor_31371;
  assign nor_31421 = ~(xbs_fraction__1[16] | ~xbs_fraction__1[15]);
  assign nor_31415 = ~(xbs_fraction__1[10] | xbs_fraction__1[9]);
  assign nor_31417 = ~(xbs_fraction__1[12] | xbs_fraction__1[11]);
  assign and_31411 = nor_31363 & nor_31362;
  assign nor_31412 = ~(xbs_fraction__1[8] | ~xbs_fraction__1[7]);
  assign nor_31406 = ~(xbs_fraction__1[2] | xbs_fraction__1[1]);
  assign nor_31408 = ~(xbs_fraction__1[4] | xbs_fraction__1[3]);
  assign and_31476 = ~(xbs_fraction__1[52] | xbs_fraction__1[51]) & nor_31432;
  assign and_31477 = and_31337 & and_31388;
  assign and_31479 = nor_31433 & ~nor_31389;
  assign and_31480 = nor_31433 & nor_31389;
  assign and_31488 = ~(xbs_fraction__1[36] | xbs_fraction__1[35]) & nor_31443;
  assign and_31489 = and_31347 & and_31398;
  assign and_31491 = nor_31444 & ~nor_31399;
  assign and_31492 = nor_31444 & nor_31399;
  assign and_31512 = and_31435 & and_31476;
  assign nor_31514 = ~(xbs_fraction__1[48] | xbs_fraction__1[47] | nor_31306);
  assign priority_sel_31522 = priority_sel_1b_2way({nor_31436, and_31435}, literal_31233, ~(xbs_fraction__1[54] | ~xbs_fraction__1[53]), ~(carry_bit | ~xbs_fraction__1[55]));
  assign and_31524 = and_31446 & and_31488;
  assign nor_31526 = ~(xbs_fraction__1[32] | xbs_fraction__1[31] | nor_31312);
  assign priority_sel_31534 = priority_sel_1b_2way({nor_31447, and_31446}, literal_31233, ~(xbs_fraction__1[38] | ~xbs_fraction__1[37]), ~(xbs_fraction__1[40] | ~xbs_fraction__1[39]));
  assign and_31509 = and_31423 & and_31428;
  assign priority_sel_31510 = priority_sel_2b_2way({~(xbs_fraction__1[24] | xbs_fraction__1[23] | nor_31376), and_31423}, {nor_31425, literal_31233}, {literal_31245, ~(xbs_fraction__1[22] | ~xbs_fraction__1[21])}, {nor_31375, nor_31425});
  assign and_31505 = nor_31417 & nor_31415;
  assign and_31501 = nor_31408 & nor_31406;
  assign concat_31557 = {literal_31245, ~(xbs_fraction__1[52] | xbs_fraction__1[51] | nor_31432) ? {literal_31245, ~(xbs_fraction__1[50] | ~xbs_fraction__1[49])} : {literal_31233, ~(xbs_fraction__1[52] | ~xbs_fraction__1[51])}};
  assign concat_31569 = {literal_31245, ~(xbs_fraction__1[36] | xbs_fraction__1[35] | nor_31443) ? {literal_31245, ~(xbs_fraction__1[34] | ~xbs_fraction__1[33])} : {literal_31233, ~(xbs_fraction__1[36] | ~xbs_fraction__1[35])}};
  assign concat_31545 = {literal_31245, priority_sel_2b_2way({~(xbs_fraction__1[20] | xbs_fraction__1[19] | nor_31381), and_31428}, {nor_31429, literal_31233}, {literal_31245, ~(xbs_fraction__1[18] | ~xbs_fraction__1[17])}, {nor_31382, nor_31429})};
  assign concat_31542 = {and_31420, priority_sel_2b_2way({~(xbs_fraction__1[16] | xbs_fraction__1[15] | nor_31371), and_31420}, {nor_31421, literal_31233}, {literal_31245, ~(xbs_fraction__1[14] | ~xbs_fraction__1[13])}, {nor_31372, nor_31421})};
  assign concat_31541 = {literal_31245, ~(xbs_fraction__1[12] | xbs_fraction__1[11] | nor_31415) ? {literal_31245, ~(xbs_fraction__1[10] | ~xbs_fraction__1[9])} : {nor_31417, ~(xbs_fraction__1[12] | ~xbs_fraction__1[11])}};
  assign concat_31539 = {and_31411, priority_sel_2b_2way({~(xbs_fraction__1[8] | xbs_fraction__1[7] | nor_31362), and_31411}, {nor_31412, literal_31233}, {literal_31245, ~(xbs_fraction__1[6] | ~xbs_fraction__1[5])}, {nor_31363, nor_31412})};
  assign concat_31538 = {literal_31245, ~(xbs_fraction__1[4] | xbs_fraction__1[3] | nor_31406) ? {literal_31245, ~(xbs_fraction__1[2] | ~xbs_fraction__1[1])} : {nor_31408, ~(xbs_fraction__1[4] | ~xbs_fraction__1[3])}};
  assign and_31578 = and_31512 & and_31477;
  assign and_31584 = and_31524 & and_31489;
  assign and_31575 = and_31420 & and_31505;
  assign fraction_shift__3 = 3'h4;
  assign literal_31596 = 4'h0;
  assign and_31605 = and_31578 & and_31584;
  assign priority_sel_31606 = priority_sel_4b_2way({~(~and_31512 | and_31477), and_31578}, literal_31596, {literal_31245, nor_31433, and_31480 & ~and_31477 | nor_31514 & ~and_31479 & ~and_31480 & ~and_31477, priority_sel_1b_4way({nor_31514, and_31479, and_31480, and_31477}, literal_31233, ~(xbs_fraction__1[42] | ~xbs_fraction__1[41]), ~(xbs_fraction__1[44] | ~xbs_fraction__1[43]), ~(xbs_fraction__1[46] | ~xbs_fraction__1[45]), ~(xbs_fraction__1[48] | ~xbs_fraction__1[47]))}, {and_31512, priority_sel_3b_2way({~(~and_31435 | and_31476), and_31512}, {nor_31436, priority_sel_31522, literal_31233}, concat_31557, {literal_31233, nor_31436, priority_sel_31522})});
  assign priority_sel_31607 = priority_sel_4b_2way({~(~and_31524 | and_31489), and_31584}, literal_31596, {literal_31245, nor_31444, and_31492 & ~and_31489 | nor_31526 & ~and_31491 & ~and_31492 & ~and_31489, priority_sel_1b_4way({nor_31526, and_31491, and_31492, and_31489}, literal_31233, ~(xbs_fraction__1[26] | ~xbs_fraction__1[25]), ~(xbs_fraction__1[28] | ~xbs_fraction__1[27]), ~(xbs_fraction__1[30] | ~xbs_fraction__1[29]), ~(xbs_fraction__1[32] | ~xbs_fraction__1[31]))}, {and_31524, priority_sel_3b_2way({~(~and_31446 | and_31488), and_31524}, {nor_31447, priority_sel_31534, literal_31233}, concat_31569, {literal_31233, nor_31447, priority_sel_31534})});
  assign sel_31719 = ~(~and_31509 | and_31575) ? {literal_31245, ~(~and_31420 | and_31505) ? concat_31541 : concat_31542} : {and_31509, priority_sel_3b_2way({~(~and_31423 | and_31428), and_31509}, {priority_sel_31510, literal_31233}, concat_31545, {and_31423, priority_sel_31510})};
  assign concat_31609 = {literal_31245, and_31411 & and_31501 ? {fraction_shift__3, ~xbs_fraction__1[0]} : {literal_31233, ~(~and_31411 | and_31501) ? concat_31538 : concat_31539}};
  assign leading_zeroes = and_31578 & and_31605 ? {literal_31245, and_31509 & and_31575 ? concat_31609 : {literal_31233, sel_31719}} : {literal_31233, priority_sel_5b_2way({~(~and_31578 | and_31584), and_31605}, {priority_sel_31606, literal_31233}, {literal_31245, priority_sel_31607}, {and_31578, priority_sel_31606})};
  assign cancel_fraction = leading_zeroes >= 6'h3a ? 58'h000_0000_0000_0000 : {literal_31233, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[56:1];
  assign carry_fraction__1 = {xbs_fraction__1[56:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_31637 = {literal_31233, shifted_fraction[55:3]} + {literal_31286, do_round_up};
  assign rounding_carry = add_31637[53];
  assign add_31650 = {literal_31233, x_bexp__3} + 12'h001;
  assign sub_31651 = {6'h00, rounding_carry} - {literal_31233, leading_zeroes};
  assign fraction_is_zero = add_31287 == 55'h00_0000_0000_0000 & ~(shrl_31274[1] | shrl_31274[2]) & ~(shrl_31274[0] | sticky);
  assign wide_exponent_associative_element = {literal_31233, add_31650};
  assign wide_exponent_associative_element__1 = {{6{sub_31651[6]}}, sub_31651};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {13{~fraction_is_zero}};
  assign MAX_EXPONENT = 11'h7ff;
  assign literal_31664 = 52'h0_0000_0000_0000;
  assign wide_exponent__2 = wide_exponent__1[11:0] & {12{~wide_exponent__1[12]}};
  assign eq_31666 = x_bexp__3 == MAX_EXPONENT;
  assign eq_31667 = x_fraction__1 == literal_31664;
  assign eq_31668 = y_bexp__3 == MAX_EXPONENT;
  assign eq_31669 = y_fraction__3 == literal_31664;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_31666 & eq_31667 | eq_31668 & eq_31669;
  assign and_reduce_31687 = &wide_exponent__2[10:0];
  assign has_pos_inf = ~(~eq_31666 | ~eq_31667 | x_sign__1) | ~(~eq_31668 | ~eq_31669 | y_sign__3);
  assign has_neg_inf = eq_31666 & eq_31667 & x_sign__1 | eq_31668 & eq_31669 & y_sign__3;
  assign rounded_fraction = {add_31637, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_31700 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_31666 | eq_31667) | ~(~eq_31668 | eq_31669) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_31287[54], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_31700[51:0];
  assign sign_ext_31706 = {52{~(is_operand_inf | wide_exponent__2[11] | and_reduce_31687 | ~((|wide_exponent__2[11:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_31706;
  assign FRACTION_HIGH_BIT = 52'h8_0000_0000_0000;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[11] | and_reduce_31687 ? MAX_EXPONENT : wide_exponent__2[10:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule