module __hfloat16__mul( input wire [15:0] x, input wire [15:0] y, output wire [15:0] out ); // lint_off MULTIPLY function automatic [21:0] umul22b_11b_x_11b (input reg [10:0] lhs, input reg [10:0] rhs); begin umul22b_11b_x_11b = lhs * rhs; end endfunction // lint_on MULTIPLY wire [4:0] x_bexp__1; wire [4:0] y_bexp__2; wire [9:0] x_fraction__1; wire [9:0] y_fraction__1; wire eq_598; wire eq_599; wire [10:0] x_fraction__3; wire [10:0] y_fraction__3; wire nor_603; wire [21:0] umul_606; wire [5:0] add_608; wire [21:0] fraction; wire [6:0] exp; wire [21:0] fraction__1; wire [21:0] sticky; wire [6:0] exp__1; wire [21:0] fraction__2; wire [6:0] exp__2; wire [21:0] fraction__3; wire [21:0] sticky__1; wire [21:0] fraction__4; wire ne_636; wire greater_than_half_way; wire [9:0] fraction__5; wire do_round_up; wire [10:0] fraction__6; wire [10:0] fraction__7; wire [6:0] add_649; wire [6:0] exp__3; wire is_subnormal; wire [4:0] high_exp; wire [5:0] result_exp; wire eq_656; wire eq_657; wire eq_658; wire eq_659; wire [5:0] result_exp__1; wire has_inf_arg; wire and_reduce_666; wire has_0_arg; wire is_result_nan; wire x_sign__1; wire y_sign__1; wire [9:0] result_fraction; wire result_sign; wire [9:0] result_fraction__3; wire [9:0] nan_fraction; wire result_sign__1; wire [4:0] result_exp__4; wire [9:0] result_fraction__4; assign x_bexp__1 = x[14:10]; assign y_bexp__2 = y[14:10]; assign x_fraction__1 = x[9:0]; assign y_fraction__1 = y[9:0]; assign eq_598 = x_bexp__1 == 5'h00; assign eq_599 = y_bexp__2 == 5'h00; assign x_fraction__3 = {1'h1, x_fraction__1}; assign y_fraction__3 = {1'h1, y_fraction__1}; assign nor_603 = ~(eq_598 | eq_599); assign umul_606 = umul22b_11b_x_11b(x_fraction__3, y_fraction__3); assign add_608 = {1'h0, x_bexp__1} + {1'h0, y_bexp__2}; assign fraction = umul_606 & {22{nor_603}}; assign exp = {1'h0, add_608} + 7'h71; assign fraction__1 = fraction >> fraction[21]; assign sticky = {21'h00_0000, fraction[0]}; assign exp__1 = exp & {7{nor_603}}; assign fraction__2 = fraction__1 | sticky; assign exp__2 = exp__1 + {6'h00, fraction[21]}; assign fraction__3 = $signed(exp__2) <= $signed(7'h00) ? {1'h0, fraction__2[21:1]} : fraction__2; assign sticky__1 = {21'h00_0000, fraction__2[0]}; assign fraction__4 = fraction__3 | sticky__1; assign ne_636 = fraction__4[8:0] != 9'h000; assign greater_than_half_way = fraction__4[9] & ne_636; assign fraction__5 = fraction__4[19:10]; assign do_round_up = greater_than_half_way | ~(~fraction__4[9] | ne_636 | ~fraction__4[10]); assign fraction__6 = {1'h0, fraction__5}; assign fraction__7 = fraction__6 + {10'h000, do_round_up}; assign add_649 = exp__2 + 7'h01; assign exp__3 = fraction__7[10] ? add_649 : exp__2; assign is_subnormal = $signed(exp__3) <= $signed(7'h00); assign high_exp = 5'h1f; assign result_exp = exp__3[5:0]; assign eq_656 = x_bexp__1 == high_exp; assign eq_657 = x_fraction__1 == 10'h000; assign eq_658 = y_bexp__2 == high_exp; assign eq_659 = y_fraction__1 == 10'h000; assign result_exp__1 = result_exp & {6{~is_subnormal}}; assign has_inf_arg = eq_656 & eq_657 | eq_658 & eq_659; assign and_reduce_666 = &result_exp__1[4:0]; assign has_0_arg = eq_598 | eq_599; assign is_result_nan = ~(~eq_656 | eq_657) | ~(~eq_658 | eq_659) | has_0_arg & has_inf_arg; assign x_sign__1 = x[15:15]; assign y_sign__1 = y[15:15]; assign result_fraction = fraction__7[9:0]; assign result_sign = x_sign__1 ^ y_sign__1; assign result_fraction__3 = result_fraction & {10{~(has_inf_arg | result_exp__1[5] | and_reduce_666 | is_subnormal)}}; assign nan_fraction = 10'h200; assign result_sign__1 = ~is_result_nan & result_sign; assign result_exp__4 = is_result_nan | has_inf_arg | result_exp__1[5] | and_reduce_666 ? high_exp : result_exp__1[4:0]; assign result_fraction__4 = is_result_nan ? nan_fraction : result_fraction__3; assign out = {result_sign__1, result_exp__4, result_fraction__4}; endmodule