module __float32__fixed_fraction(
  input wire [31:0] input_float,
  output wire [22:0] out
);
  wire [7:0] input_float_bexp__1;
  wire [7:0] unbiased_input_float_exponent;
  wire [22:0] input_float_fraction;
  wire [23:0] input_fraction_magnitude_shift_bits;
  wire [4:0] fraction_right_shift;
  wire [23:0] shrl_144;
  wire [2:0] fraction_left_shift;
  wire [22:0] input_fixed_magnitude__1;
  wire input_float_sign;
  wire [22:0] sub_153;
  wire [22:0] fixed_fraction__1;
  assign input_float_bexp__1 = input_float[30:23];
  assign unbiased_input_float_exponent = input_float_bexp__1 + 8'h81;
  assign input_float_fraction = input_float[22:0];
  assign input_fraction_magnitude_shift_bits = {1'h1, input_float_fraction};
  assign fraction_right_shift = -unbiased_input_float_exponent[4:0];
  assign shrl_144 = fraction_right_shift >= 5'h18 ? 24'h00_0000 : input_fraction_magnitude_shift_bits >> fraction_right_shift;
  assign fraction_left_shift = unbiased_input_float_exponent[2:0];
  assign input_fixed_magnitude__1 = $signed(unbiased_input_float_exponent) > $signed(8'h00) ? input_float_fraction << fraction_left_shift : shrl_144[22:0];
  assign input_float_sign = input_float[31:31];
  assign sub_153 = 23'h00_0000 - input_fixed_magnitude__1;
  assign fixed_fraction__1 = input_float_sign & input_fixed_magnitude__1 != 23'h00_0000 ? sub_153 : input_fixed_magnitude__1;
  assign out = fixed_fraction__1;
endmodule