module __bfloat16__mul(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire [15:0] out
);
  // lint_off MULTIPLY
  function automatic [15:0] umul16b_8b_x_8b (input reg [7:0] lhs, input reg [7:0] rhs);
    begin
      umul16b_8b_x_8b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  wire [7:0] x_bexp__1;
  wire [7:0] y_bexp__2;
  wire [6:0] x_fraction__1;
  wire [6:0] y_fraction__1;
  wire eq_598;
  wire eq_599;
  wire [7:0] x_fraction__3;
  wire [7:0] y_fraction__3;
  wire nor_603;
  wire [15:0] umul_606;
  wire [8:0] add_608;
  wire [15:0] fraction;
  wire [9:0] exp;
  wire [15:0] fraction__1;
  wire [15:0] sticky;
  wire [9:0] exp__1;
  wire [15:0] fraction__2;
  wire [9:0] exp__2;
  wire [15:0] fraction__3;
  wire [15:0] sticky__1;
  wire [15:0] fraction__4;
  wire ne_636;
  wire greater_than_half_way;
  wire [6:0] fraction__5;
  wire do_round_up;
  wire [7:0] fraction__6;
  wire [7:0] fraction__7;
  wire [9:0] add_649;
  wire [9:0] exp__3;
  wire is_subnormal;
  wire [7:0] high_exp;
  wire [8:0] result_exp;
  wire eq_656;
  wire eq_657;
  wire eq_658;
  wire eq_659;
  wire [8:0] result_exp__1;
  wire has_inf_arg;
  wire and_reduce_666;
  wire has_0_arg;
  wire is_result_nan;
  wire x_sign__1;
  wire y_sign__1;
  wire [6:0] result_fraction;
  wire result_sign;
  wire [6:0] result_fraction__3;
  wire [6:0] nan_fraction;
  wire result_sign__1;
  wire [7:0] result_exp__4;
  wire [6:0] result_fraction__4;
  assign x_bexp__1 = x[14:7];
  assign y_bexp__2 = y[14:7];
  assign x_fraction__1 = x[6:0];
  assign y_fraction__1 = y[6:0];
  assign eq_598 = x_bexp__1 == 8'h00;
  assign eq_599 = y_bexp__2 == 8'h00;
  assign x_fraction__3 = {1'h1, x_fraction__1};
  assign y_fraction__3 = {1'h1, y_fraction__1};
  assign nor_603 = ~(eq_598 | eq_599);
  assign umul_606 = umul16b_8b_x_8b(x_fraction__3, y_fraction__3);
  assign add_608 = {1'h0, x_bexp__1} + {1'h0, y_bexp__2};
  assign fraction = umul_606 & {16{nor_603}};
  assign exp = {1'h0, add_608} + 10'h381;
  assign fraction__1 = fraction >> fraction[15];
  assign sticky = {15'h0000, fraction[0]};
  assign exp__1 = exp & {10{nor_603}};
  assign fraction__2 = fraction__1 | sticky;
  assign exp__2 = exp__1 + {9'h000, fraction[15]};
  assign fraction__3 = $signed(exp__2) <= $signed(10'h000) ? {1'h0, fraction__2[15:1]} : fraction__2;
  assign sticky__1 = {15'h0000, fraction__2[0]};
  assign fraction__4 = fraction__3 | sticky__1;
  assign ne_636 = fraction__4[5:0] != 6'h00;
  assign greater_than_half_way = fraction__4[6] & ne_636;
  assign fraction__5 = fraction__4[13:7];
  assign do_round_up = greater_than_half_way | ~(~fraction__4[6] | ne_636 | ~fraction__4[7]);
  assign fraction__6 = {1'h0, fraction__5};
  assign fraction__7 = fraction__6 + {7'h00, do_round_up};
  assign add_649 = exp__2 + 10'h001;
  assign exp__3 = fraction__7[7] ? add_649 : exp__2;
  assign is_subnormal = $signed(exp__3) <= $signed(10'h000);
  assign high_exp = 8'hff;
  assign result_exp = exp__3[8:0];
  assign eq_656 = x_bexp__1 == high_exp;
  assign eq_657 = x_fraction__1 == 7'h00;
  assign eq_658 = y_bexp__2 == high_exp;
  assign eq_659 = y_fraction__1 == 7'h00;
  assign result_exp__1 = result_exp & {9{~is_subnormal}};
  assign has_inf_arg = eq_656 & eq_657 | eq_658 & eq_659;
  assign and_reduce_666 = &result_exp__1[7:0];
  assign has_0_arg = eq_598 | eq_599;
  assign is_result_nan = ~(~eq_656 | eq_657) | ~(~eq_658 | eq_659) | has_0_arg & has_inf_arg;
  assign x_sign__1 = x[15:15];
  assign y_sign__1 = y[15:15];
  assign result_fraction = fraction__7[6:0];
  assign result_sign = x_sign__1 ^ y_sign__1;
  assign result_fraction__3 = result_fraction & {7{~(has_inf_arg | result_exp__1[8] | and_reduce_666 | is_subnormal)}};
  assign nan_fraction = 7'h40;
  assign result_sign__1 = ~is_result_nan & result_sign;
  assign result_exp__4 = is_result_nan | has_inf_arg | result_exp__1[8] | and_reduce_666 ? high_exp : result_exp__1[7:0];
  assign result_fraction__4 = is_result_nan ? nan_fraction : result_fraction__3;
  assign out = {result_sign__1, result_exp__4, result_fraction__4};
endmodule