module __hfloat16__sub(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire [15:0] out
);
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [4:0] y_bexp__2;
  wire [4:0] x_bexp__2;
  wire [4:0] y__1_bexpnot__1;
  wire [5:0] x_bexp_extended__2;
  wire [5:0] y__1_bexpnot_extended__1;
  wire [5:0] full_result;
  wire overflow_detected;
  wire [9:0] y_fraction__2;
  wire [9:0] tuple_index_30697;
  wire [4:0] x_bexp__3;
  wire [4:0] y_bexp__3;
  wire [9:0] x_fraction__1;
  wire [9:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [10:0] fraction_x;
  wire [10:0] fraction_y;
  wire [10:0] sign_ext_30711;
  wire [4:0] narrowed_result;
  wire [4:0] x_bexpor_mask__1;
  wire tuple_index_30716;
  wire [10:0] fraction_x__1;
  wire [10:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [4:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [11:0] wide_x_squeezed;
  wire [13:0] wide_y_shift_bits;
  wire [4:0] shift;
  wire [13:0] shrl_30730;
  wire [14:0] shll_30732;
  wire [11:0] xddend_x__2_squeezed;
  wire [12:0] add_30743;
  wire sticky;
  wire [14:0] concat_30749;
  wire [14:0] xbs_fraction__1;
  wire carry_bit;
  wire nor_30783;
  wire nor_30785;
  wire nor_30778;
  wire nor_30780;
  wire and_30797;
  wire and_30808;
  wire [2:0] concat_30816;
  wire [2:0] concat_30815;
  wire [2:0] concat_30813;
  wire [2:0] concat_30812;
  wire [3:0] leading_zeroes;
  wire [15:0] cancel_fraction;
  wire [13:0] cancel_fraction__1;
  wire [13:0] carry_fraction__1;
  wire [13:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [2:0] fraction_shift__3;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [11:0] add_30840;
  wire rounding_carry;
  wire [5:0] add_30852;
  wire [4:0] sub_30853;
  wire fraction_is_zero;
  wire [6:0] wide_exponent_associative_element;
  wire [6:0] wide_exponent_associative_element__1;
  wire [6:0] wide_exponent;
  wire [6:0] wide_exponent__1;
  wire [4:0] MAX_EXPONENT;
  wire [5:0] wide_exponent__2;
  wire eq_30868;
  wire eq_30869;
  wire eq_30870;
  wire eq_30871;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_30889;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [14:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [14:0] shrl_30902;
  wire is_result_nan;
  wire result_sign;
  wire [9:0] result_fraction;
  wire [9:0] sign_ext_30908;
  wire result_sign__1;
  wire [9:0] result_fraction__3;
  wire [9:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [4:0] result_exponent__2;
  wire [9:0] result_fraction__4;
  assign y_bexp__2 = y[14:10];
  assign x_bexp__2 = x[14:10];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {1'h0, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {1'h0, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[5];
  assign y_fraction__2 = y[9:0];
  assign tuple_index_30697 = x[9:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign x_fraction__1 = overflow_detected ? tuple_index_30697 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_30697;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[15:15];
  assign fraction_x = {1'h1, x_fraction__1};
  assign fraction_y = {1'h1, y_fraction__3};
  assign sign_ext_30711 = {11{y_bexp__3 != 5'h00}};
  assign narrowed_result = full_result[4:0];
  assign x_bexpor_mask__1 = {5{nc}};
  assign tuple_index_30716 = x[15:15];
  assign fraction_x__1 = fraction_x & {11{x_bexp__3 != 5'h00}};
  assign fraction_y__1 = fraction_y & sign_ext_30711;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_30716 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_30716;
  assign wide_x_squeezed = {1'h0, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {4'h0, overflow_detected};
  assign shrl_30730 = shift >= 5'h0e ? 14'h0000 : wide_y_shift_bits >> shift;
  assign shll_30732 = shift >= 5'h0f ? 15'h0000 : 15'h7fff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign add_30743 = {{1{xddend_x__2_squeezed[11]}}, xddend_x__2_squeezed} + {2'h0, shrl_30730[13:3]};
  assign sticky = ~({1'h0, ~y_fraction__3} | ~sign_ext_30711 | shll_30732[13:3]) != 11'h000;
  assign concat_30749 = {add_30743[11:0], shrl_30730[2:1], shrl_30730[0] | sticky};
  assign xbs_fraction__1 = add_30743[12] ? -concat_30749 : concat_30749;
  assign carry_bit = xbs_fraction__1[14];
  assign nor_30783 = ~(xbs_fraction__1[12] | xbs_fraction__1[11]);
  assign nor_30785 = ~(xbs_fraction__1[8] | xbs_fraction__1[7]);
  assign nor_30778 = ~(xbs_fraction__1[4] | xbs_fraction__1[3]);
  assign nor_30780 = ~(xbs_fraction__1[6] | xbs_fraction__1[5]);
  assign and_30797 = ~(carry_bit | xbs_fraction__1[13]) & nor_30783;
  assign and_30808 = ~(xbs_fraction__1[10] | xbs_fraction__1[9]) & nor_30785;
  assign concat_30816 = {1'h0, ~(carry_bit | xbs_fraction__1[13] | nor_30783) ? {1'h1, ~(xbs_fraction__1[12] | ~xbs_fraction__1[11])} : {1'h0, ~(carry_bit | ~xbs_fraction__1[13])}};
  assign concat_30815 = {1'h1, ~(xbs_fraction__1[10] | xbs_fraction__1[9] | nor_30785) ? {1'h1, ~(xbs_fraction__1[8] | ~xbs_fraction__1[7])} : {1'h0, ~(xbs_fraction__1[10] | ~xbs_fraction__1[9])}};
  assign concat_30813 = {1'h0, ~(xbs_fraction__1[6] | xbs_fraction__1[5] | nor_30778) ? {1'h1, ~(xbs_fraction__1[4] | ~xbs_fraction__1[3])} : {nor_30780, ~(xbs_fraction__1[6] | ~xbs_fraction__1[5])}};
  assign concat_30812 = {1'h1, ~(xbs_fraction__1[2] | xbs_fraction__1[1]) ? {1'h1, ~xbs_fraction__1[0]} : {1'h0, ~(xbs_fraction__1[2] | ~xbs_fraction__1[1])}};
  assign leading_zeroes = and_30797 & and_30808 ? {1'h1, nor_30780 & nor_30778 ? concat_30812 : concat_30813} : {1'h0, ~(~and_30797 | and_30808) ? concat_30815 : concat_30816};
  assign cancel_fraction = {1'h0, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[14:1];
  assign carry_fraction__1 = {xbs_fraction__1[14:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign fraction_shift__3 = 3'h4;
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_30840 = {1'h0, shifted_fraction[13:3]} + {11'h000, do_round_up};
  assign rounding_carry = add_30840[11];
  assign add_30852 = {1'h0, x_bexp__3} + 6'h01;
  assign sub_30853 = {4'h0, rounding_carry} - {1'h0, leading_zeroes};
  assign fraction_is_zero = add_30743 == 13'h0000 & ~(shrl_30730[1] | shrl_30730[2]) & ~(shrl_30730[0] | sticky);
  assign wide_exponent_associative_element = {1'h0, add_30852};
  assign wide_exponent_associative_element__1 = {{2{sub_30853[4]}}, sub_30853};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {7{~fraction_is_zero}};
  assign MAX_EXPONENT = 5'h1f;
  assign wide_exponent__2 = wide_exponent__1[5:0] & {6{~wide_exponent__1[6]}};
  assign eq_30868 = x_bexp__3 == MAX_EXPONENT;
  assign eq_30869 = x_fraction__1 == 10'h000;
  assign eq_30870 = y_bexp__3 == MAX_EXPONENT;
  assign eq_30871 = y_fraction__3 == 10'h000;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_30868 & eq_30869 | eq_30870 & eq_30871;
  assign and_reduce_30889 = &wide_exponent__2[4:0];
  assign has_pos_inf = ~(~eq_30868 | ~eq_30869 | x_sign__1) | ~(~eq_30870 | ~eq_30871 | y_sign__3);
  assign has_neg_inf = eq_30868 & eq_30869 & x_sign__1 | eq_30870 & eq_30871 & y_sign__3;
  assign rounded_fraction = {add_30840, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_30902 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_30868 | eq_30869) | ~(~eq_30870 | eq_30871) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_30743[12], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_30902[9:0];
  assign sign_ext_30908 = {10{~(is_operand_inf | wide_exponent__2[5] | and_reduce_30889 | ~((|wide_exponent__2[5:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_30908;
  assign FRACTION_HIGH_BIT = 10'h200;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[5] | and_reduce_30889 ? MAX_EXPONENT : wide_exponent__2[4:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule