module __std__next_pow2(
  input wire [31:0] n,
  output wire [31:0] out
);
  // lint_off MULTIPLY
  function automatic [14:0] umul15b_8b_x_8b (input reg [7:0] lhs, input reg [7:0] rhs);
    begin
      umul15b_8b_x_8b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  // lint_off MULTIPLY
  function automatic [29:0] umul30b_16b_x_15b (input reg [15:0] lhs, input reg [14:0] rhs);
    begin
      umul30b_16b_x_15b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  // lint_off MULTIPLY
  function automatic [26:0] umul27b_15b_x_15b (input reg [14:0] lhs, input reg [14:0] rhs);
    begin
      umul27b_15b_x_15b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  // lint_off MULTIPLY
  function automatic [27:0] umul28b_28b_x_27b (input reg [27:0] lhs, input reg [26:0] rhs);
    begin
      umul28b_28b_x_27b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  wire [31:0] add_5842;
  wire [31:0] reverse_5843;
  wire [32:0] one_hot_5844;
  wire umul_4074_TrailingBits_;
  wire [6:0] sub_5851;
  wire [6:0] and_5853;
  wire [1:0] result_squeezed;
  wire [1:0] result__1_squeezed;
  wire [3:0] result__1_squeezed__1;
  wire [3:0] result__2_squeezed;
  wire [7:0] result__2_squeezed__1;
  wire [7:0] result__3_squeezed;
  wire [7:0] concat_5882;
  wire [15:0] result__3_squeezed__1;
  wire [7:0] sel_5886;
  wire [15:0] result__4_squeezed;
  wire [14:0] umul_5888;
  wire [15:0] result__4_squeezed_const_msb_bits;
  wire [29:0] umul_4317_NarrowedMult__NarrowedMult_;
  wire [31:0] result__4;
  wire [31:0] result__5;
  wire [26:0] umul_5644_NarrowedMult_;
  wire [27:0] umul_4074_NarrowedMult__NarrowedMult__NarrowedMult_;
  wire [31:0] result__6;
  wire [31:0] result__32;
  assign add_5842 = n + 32'hffff_ffff;
  assign reverse_5843 = {add_5842[0], add_5842[1], add_5842[2], add_5842[3], add_5842[4], add_5842[5], add_5842[6], add_5842[7], add_5842[8], add_5842[9], add_5842[10], add_5842[11], add_5842[12], add_5842[13], add_5842[14], add_5842[15], add_5842[16], add_5842[17], add_5842[18], add_5842[19], add_5842[20], add_5842[21], add_5842[22], add_5842[23], add_5842[24], add_5842[25], add_5842[26], add_5842[27], add_5842[28], add_5842[29], add_5842[30], add_5842[31]};
  assign one_hot_5844 = {reverse_5843[31:0] == 32'h0000_0000, reverse_5843[31] && reverse_5843[30:0] == 31'h0000_0000, reverse_5843[30] && reverse_5843[29:0] == 30'h0000_0000, reverse_5843[29] && reverse_5843[28:0] == 29'h0000_0000, reverse_5843[28] && reverse_5843[27:0] == 28'h000_0000, reverse_5843[27] && reverse_5843[26:0] == 27'h000_0000, reverse_5843[26] && reverse_5843[25:0] == 26'h000_0000, reverse_5843[25] && reverse_5843[24:0] == 25'h000_0000, reverse_5843[24] && reverse_5843[23:0] == 24'h00_0000, reverse_5843[23] && reverse_5843[22:0] == 23'h00_0000, reverse_5843[22] && reverse_5843[21:0] == 22'h00_0000, reverse_5843[21] && reverse_5843[20:0] == 21'h00_0000, reverse_5843[20] && reverse_5843[19:0] == 20'h0_0000, reverse_5843[19] && reverse_5843[18:0] == 19'h0_0000, reverse_5843[18] && reverse_5843[17:0] == 18'h0_0000, reverse_5843[17] && reverse_5843[16:0] == 17'h0_0000, reverse_5843[16] && reverse_5843[15:0] == 16'h0000, reverse_5843[15] && reverse_5843[14:0] == 15'h0000, reverse_5843[14] && reverse_5843[13:0] == 14'h0000, reverse_5843[13] && reverse_5843[12:0] == 13'h0000, reverse_5843[12] && reverse_5843[11:0] == 12'h000, reverse_5843[11] && reverse_5843[10:0] == 11'h000, reverse_5843[10] && reverse_5843[9:0] == 10'h000, reverse_5843[9] && reverse_5843[8:0] == 9'h000, reverse_5843[8] && reverse_5843[7:0] == 8'h00, reverse_5843[7] && reverse_5843[6:0] == 7'h00, reverse_5843[6] && reverse_5843[5:0] == 6'h00, reverse_5843[5] && reverse_5843[4:0] == 5'h00, reverse_5843[4] && reverse_5843[3:0] == 4'h0, reverse_5843[3] && reverse_5843[2:0] == 3'h0, reverse_5843[2] && reverse_5843[1:0] == 2'h0, reverse_5843[1] && !reverse_5843[0], reverse_5843[0]};
  assign umul_4074_TrailingBits_ = 1'h0;
  assign sub_5851 = 7'h20 - {umul_4074_TrailingBits_, {one_hot_5844[32], one_hot_5844[16] | one_hot_5844[17] | one_hot_5844[18] | one_hot_5844[19] | one_hot_5844[20] | one_hot_5844[21] | one_hot_5844[22] | one_hot_5844[23] | one_hot_5844[24] | one_hot_5844[25] | one_hot_5844[26] | one_hot_5844[27] | one_hot_5844[28] | one_hot_5844[29] | one_hot_5844[30] | one_hot_5844[31], one_hot_5844[8] | one_hot_5844[9] | one_hot_5844[10] | one_hot_5844[11] | one_hot_5844[12] | one_hot_5844[13] | one_hot_5844[14] | one_hot_5844[15] | one_hot_5844[24] | one_hot_5844[25] | one_hot_5844[26] | one_hot_5844[27] | one_hot_5844[28] | one_hot_5844[29] | one_hot_5844[30] | one_hot_5844[31], one_hot_5844[4] | one_hot_5844[5] | one_hot_5844[6] | one_hot_5844[7] | one_hot_5844[12] | one_hot_5844[13] | one_hot_5844[14] | one_hot_5844[15] | one_hot_5844[20] | one_hot_5844[21] | one_hot_5844[22] | one_hot_5844[23] | one_hot_5844[28] | one_hot_5844[29] | one_hot_5844[30] | one_hot_5844[31], one_hot_5844[2] | one_hot_5844[3] | one_hot_5844[6] | one_hot_5844[7] | one_hot_5844[10] | one_hot_5844[11] | one_hot_5844[14] | one_hot_5844[15] | one_hot_5844[18] | one_hot_5844[19] | one_hot_5844[22] | one_hot_5844[23] | one_hot_5844[26] | one_hot_5844[27] | one_hot_5844[30] | one_hot_5844[31], one_hot_5844[1] | one_hot_5844[3] | one_hot_5844[5] | one_hot_5844[7] | one_hot_5844[9] | one_hot_5844[11] | one_hot_5844[13] | one_hot_5844[15] | one_hot_5844[17] | one_hot_5844[19] | one_hot_5844[21] | one_hot_5844[23] | one_hot_5844[25] | one_hot_5844[27] | one_hot_5844[29] | one_hot_5844[31]}};
  assign and_5853 = sub_5851 & {7{n != 32'h0000_0000}};
  assign result_squeezed = 2'h1;
  assign result__1_squeezed = and_5853[0] ? 2'h2 : result_squeezed;
  assign result__1_squeezed__1 = {2'h0, result__1_squeezed};
  assign result__2_squeezed = and_5853[1] ? {result__1_squeezed, 2'h0} : result__1_squeezed__1;
  assign result__2_squeezed__1 = {4'h0, result__2_squeezed};
  assign result__3_squeezed = and_5853[2] ? {result__2_squeezed, 4'h0} : result__2_squeezed__1;
  assign concat_5882 = {4'h0, and_5853[6:1] == 6'h00 ? {2'h0, and_5853 == 7'h00 ? result_squeezed : 2'h2} : 4'h8};
  assign result__3_squeezed__1 = {8'h00, result__3_squeezed};
  assign sel_5886 = and_5853[6:2] == 5'h00 ? concat_5882 : 8'h80;
  assign result__4_squeezed = and_5853[3] ? {result__3_squeezed, 8'h00} : result__3_squeezed__1;
  assign umul_5888 = umul15b_8b_x_8b(sel_5886, sel_5886);
  assign result__4_squeezed_const_msb_bits = 16'h0000;
  assign umul_4317_NarrowedMult__NarrowedMult_ = umul30b_16b_x_15b(result__4_squeezed, umul_5888);
  assign result__4 = {result__4_squeezed_const_msb_bits, result__4_squeezed};
  assign result__5 = and_5853[4] ? {umul_4317_NarrowedMult__NarrowedMult_, 2'h0} : result__4;
  assign umul_5644_NarrowedMult_ = umul27b_15b_x_15b(umul_5888, umul_5888);
  assign umul_4074_NarrowedMult__NarrowedMult__NarrowedMult_ = umul28b_28b_x_27b(result__5[27:0], umul_5644_NarrowedMult_);
  assign result__6 = and_5853[5] ? {umul_4074_NarrowedMult__NarrowedMult__NarrowedMult_, 4'h0} : result__5;
  assign result__32 = result__6 & {32{~and_5853[6]}};
  assign out = result__32;
endmodule