module __float64__eq_2( input wire [63:0] x, input wire [63:0] y, output wire out ); wire [10:0] x_bexp__2; wire [10:0] literal_139; wire [51:0] x_fraction__2; wire [51:0] literal_141; wire [10:0] y_bexp__1; wire [51:0] y_fraction__1; wire x_sign__2; wire y_sign__1; wire [10:0] literal_146; assign x_bexp__2 = x[62:52]; assign literal_139 = 11'h7ff; assign x_fraction__2 = x[51:0]; assign literal_141 = 52'h0_0000_0000_0000; assign y_bexp__1 = y[62:52]; assign y_fraction__1 = y[51:0]; assign x_sign__2 = x[63:63]; assign y_sign__1 = y[63:63]; assign literal_146 = 11'h000; assign out = ~(x_bexp__2 == literal_139 & x_fraction__2 != literal_141 | y_bexp__1 == literal_139 & y_fraction__1 != literal_141) & (x_sign__2 == y_sign__1 & x_bexp__2 == y_bexp__1 & x_fraction__2 == y_fraction__1 | x_bexp__2 == literal_146 & y_bexp__1 == literal_146); endmodule