module __bfloat16__from_uint8(
  input wire [7:0] x,
  output wire [15:0] out
);
  wire [7:0] reverse_107;
  wire [8:0] one_hot_108;
  wire [3:0] lz;
  wire [3:0] add_116;
  wire [7:0] BIAS;
  wire ne_119;
  wire [7:0] shll_120;
  wire [7:0] bexp;
  wire [6:0] fraction;
  wire sign;
  assign reverse_107 = {x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7]};
  assign one_hot_108 = {reverse_107[7:0] == 8'h00, reverse_107[7] && reverse_107[6:0] == 7'h00, reverse_107[6] && reverse_107[5:0] == 6'h00, reverse_107[5] && reverse_107[4:0] == 5'h00, reverse_107[4] && reverse_107[3:0] == 4'h0, reverse_107[3] && reverse_107[2:0] == 3'h0, reverse_107[2] && reverse_107[1:0] == 2'h0, reverse_107[1] && !reverse_107[0], reverse_107[0]};
  assign lz = {one_hot_108[8], one_hot_108[4] | one_hot_108[5] | one_hot_108[6] | one_hot_108[7], one_hot_108[2] | one_hot_108[3] | one_hot_108[6] | one_hot_108[7], one_hot_108[1] | one_hot_108[3] | one_hot_108[5] | one_hot_108[7]};
  assign add_116 = lz + 4'h1;
  assign BIAS = 8'h7f;
  assign ne_119 = x != 8'h00;
  assign shll_120 = add_116 >= 4'h8 ? 8'h00 : x << add_116;
  assign bexp = {4'h0, lz[3], ~lz[2:0]} + BIAS;
  assign fraction = shll_120[7:1];
  assign sign = 1'h0;
  assign out = {sign, bexp & {8{ne_119}}, fraction & {7{ne_119}}};
endmodule