module __bfloat16__from_uint8(
  input wire [7:0] x,
  output wire [15:0] out
);
  wire [7:0] reverse_112;
  wire [8:0] one_hot_113;
  wire [3:0] lz;
  wire sign;
  wire sub_120;
  wire [3:0] add_123;
  wire [7:0] BIAS;
  wire ne_126;
  wire [7:0] shll_127;
  wire [7:0] bexp;
  wire [6:0] fraction;
  assign reverse_112 = {x[0], x[1], x[2], x[3], x[4], x[5], x[6], x[7]};
  assign one_hot_113 = {reverse_112[7:0] == 8'h00, reverse_112[7] && reverse_112[6:0] == 7'h00, reverse_112[6] && reverse_112[5:0] == 6'h00, reverse_112[5] && reverse_112[4:0] == 5'h00, reverse_112[4] && reverse_112[3:0] == 4'h0, reverse_112[3] && reverse_112[2:0] == 3'h0, reverse_112[2] && reverse_112[1:0] == 2'h0, reverse_112[1] && !reverse_112[0], reverse_112[0]};
  assign lz = {one_hot_113[8], one_hot_113[4] | one_hot_113[5] | one_hot_113[6] | one_hot_113[7], one_hot_113[2] | one_hot_113[3] | one_hot_113[6] | one_hot_113[7], one_hot_113[1] | one_hot_113[3] | one_hot_113[5] | one_hot_113[7]};
  assign sign = 1'h0;
  assign sub_120 = sign - lz[3];
  assign add_123 = lz + 4'h1;
  assign BIAS = 8'h7f;
  assign ne_126 = x != 8'h00;
  assign shll_127 = add_123 >= 4'h8 ? 8'h00 : x << add_123;
  assign bexp = {4'h0, sub_120, ~lz[2:0]} + BIAS;
  assign fraction = shll_127[7:1];
  assign out = {sign, bexp & {8{ne_126}}, fraction & {7{ne_126}}};
endmodule