module __hfloat16__add(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire [15:0] out
);
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [4:0] y_bexp__1;
  wire literal_28011;
  wire [4:0] x_bexp__1;
  wire [4:0] y_bexpnot;
  wire [5:0] x_bexp_extended__1;
  wire [5:0] y_bexpnot_extended;
  wire [5:0] full_result;
  wire overflow_detected;
  wire [9:0] tuple_index_28018;
  wire [9:0] tuple_index_28019;
  wire [4:0] x_bexp;
  wire [4:0] literal_28021;
  wire [4:0] y_bexp;
  wire literal_28023;
  wire [9:0] x_fraction;
  wire [9:0] y_fraction;
  wire nc;
  wire [10:0] fraction_x;
  wire [10:0] fraction_y;
  wire [10:0] sign_ext_28032;
  wire [4:0] narrowed_result;
  wire [4:0] x_bexpor_mask;
  wire [3:0] literal_28035;
  wire tuple_index_28036;
  wire tuple_index_28037;
  wire [10:0] fraction_x__1;
  wire [10:0] fraction_y__1;
  wire [2:0] xddend_x__1_squeezed_const_lsb_bits;
  wire [4:0] result;
  wire x_sign;
  wire y_sign;
  wire [11:0] wide_x_squeezed;
  wire [13:0] wide_y_shift_bits;
  wire [4:0] shift;
  wire [13:0] shrl_28051;
  wire [14:0] shll_28053;
  wire [11:0] xddend_x__1_squeezed;
  wire [10:0] literal_28063;
  wire [12:0] add_28064;
  wire sticky;
  wire [14:0] concat_28070;
  wire [14:0] xbs_fraction;
  wire carry_bit;
  wire nor_28104;
  wire nor_28106;
  wire nor_28099;
  wire nor_28101;
  wire and_28118;
  wire and_28129;
  wire [2:0] concat_28137;
  wire [2:0] concat_28136;
  wire [2:0] concat_28134;
  wire [2:0] concat_28133;
  wire [3:0] leading_zeroes;
  wire [15:0] cancel_fraction;
  wire [13:0] cancel_fraction__1;
  wire [13:0] carry_fraction__1;
  wire [13:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [2:0] fraction_shift__3;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [11:0] add_28161;
  wire rounding_carry;
  wire [5:0] add_28173;
  wire [4:0] sub_28174;
  wire fraction_is_zero;
  wire [6:0] wide_exponent_associative_element;
  wire [6:0] wide_exponent_associative_element__1;
  wire [6:0] wide_exponent;
  wire [6:0] wide_exponent__1;
  wire [4:0] MAX_EXPONENT;
  wire [9:0] literal_28187;
  wire [5:0] wide_exponent__2;
  wire eq_28189;
  wire eq_28190;
  wire eq_28191;
  wire eq_28192;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_28210;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [14:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [14:0] shrl_28223;
  wire is_result_nan;
  wire result_sign;
  wire [9:0] result_fraction;
  wire [9:0] sign_ext_28229;
  wire result_sign__1;
  wire [9:0] result_fraction__3;
  wire [9:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [4:0] result_exponent__2;
  wire [9:0] result_fraction__4;
  assign y_bexp__1 = y[14:10];
  assign literal_28011 = 1'h0;
  assign x_bexp__1 = x[14:10];
  assign y_bexpnot = ~y_bexp__1;
  assign x_bexp_extended__1 = {literal_28011, x_bexp__1};
  assign y_bexpnot_extended = {literal_28011, y_bexpnot};
  assign full_result = x_bexp_extended__1 + y_bexpnot_extended;
  assign overflow_detected = full_result[5];
  assign tuple_index_28018 = y[9:0];
  assign tuple_index_28019 = x[9:0];
  assign x_bexp = overflow_detected ? x_bexp__1 : y_bexp__1;
  assign literal_28021 = 5'h00;
  assign y_bexp = overflow_detected ? y_bexp__1 : x_bexp__1;
  assign literal_28023 = 1'h1;
  assign x_fraction = overflow_detected ? tuple_index_28019 : tuple_index_28018;
  assign y_fraction = overflow_detected ? tuple_index_28018 : tuple_index_28019;
  assign nc = ~overflow_detected;
  assign fraction_x = {literal_28023, x_fraction};
  assign fraction_y = {literal_28023, y_fraction};
  assign sign_ext_28032 = {11{y_bexp != literal_28021}};
  assign narrowed_result = full_result[4:0];
  assign x_bexpor_mask = {5{nc}};
  assign literal_28035 = 4'h0;
  assign tuple_index_28036 = y[15:15];
  assign tuple_index_28037 = x[15:15];
  assign fraction_x__1 = fraction_x & {11{x_bexp != literal_28021}};
  assign fraction_y__1 = fraction_y & sign_ext_28032;
  assign xddend_x__1_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask;
  assign x_sign = overflow_detected ? tuple_index_28037 : tuple_index_28036;
  assign y_sign = overflow_detected ? tuple_index_28036 : tuple_index_28037;
  assign wide_x_squeezed = {literal_28011, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__1_squeezed_const_lsb_bits};
  assign shift = result + {literal_28035, overflow_detected};
  assign shrl_28051 = shift >= 5'h0e ? 14'h0000 : wide_y_shift_bits >> shift;
  assign shll_28053 = shift >= 5'h0f ? 15'h0000 : 15'h7fff << shift;
  assign xddend_x__1_squeezed = x_sign ^ y_sign ? -wide_x_squeezed : wide_x_squeezed;
  assign literal_28063 = 11'h000;
  assign add_28064 = {{1{xddend_x__1_squeezed[11]}}, xddend_x__1_squeezed} + {2'h0, shrl_28051[13:3]};
  assign sticky = ~({literal_28011, ~y_fraction} | ~sign_ext_28032 | shll_28053[13:3]) != literal_28063;
  assign concat_28070 = {add_28064[11:0], shrl_28051[2:1], shrl_28051[0] | sticky};
  assign xbs_fraction = add_28064[12] ? -concat_28070 : concat_28070;
  assign carry_bit = xbs_fraction[14];
  assign nor_28104 = ~(xbs_fraction[12] | xbs_fraction[11]);
  assign nor_28106 = ~(xbs_fraction[8] | xbs_fraction[7]);
  assign nor_28099 = ~(xbs_fraction[4] | xbs_fraction[3]);
  assign nor_28101 = ~(xbs_fraction[6] | xbs_fraction[5]);
  assign and_28118 = ~(carry_bit | xbs_fraction[13]) & nor_28104;
  assign and_28129 = ~(xbs_fraction[10] | xbs_fraction[9]) & nor_28106;
  assign concat_28137 = {literal_28011, ~(carry_bit | xbs_fraction[13] | nor_28104) ? {literal_28023, ~(xbs_fraction[12] | ~xbs_fraction[11])} : {literal_28011, ~(carry_bit | ~xbs_fraction[13])}};
  assign concat_28136 = {literal_28023, ~(xbs_fraction[10] | xbs_fraction[9] | nor_28106) ? {literal_28023, ~(xbs_fraction[8] | ~xbs_fraction[7])} : {literal_28011, ~(xbs_fraction[10] | ~xbs_fraction[9])}};
  assign concat_28134 = {literal_28011, ~(xbs_fraction[6] | xbs_fraction[5] | nor_28099) ? {literal_28023, ~(xbs_fraction[4] | ~xbs_fraction[3])} : {nor_28101, ~(xbs_fraction[6] | ~xbs_fraction[5])}};
  assign concat_28133 = {literal_28023, ~(xbs_fraction[2] | xbs_fraction[1]) ? {literal_28023, ~xbs_fraction[0]} : {literal_28011, ~(xbs_fraction[2] | ~xbs_fraction[1])}};
  assign leading_zeroes = and_28118 & and_28129 ? {literal_28023, nor_28101 & nor_28099 ? concat_28133 : concat_28134} : {literal_28011, ~(~and_28118 | and_28129) ? concat_28136 : concat_28137};
  assign cancel_fraction = {literal_28011, xbs_fraction} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[14:1];
  assign carry_fraction__1 = {xbs_fraction[14:2], xbs_fraction[1] | xbs_fraction[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign fraction_shift__3 = 3'h4;
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_28161 = {literal_28011, shifted_fraction[13:3]} + {literal_28063, do_round_up};
  assign rounding_carry = add_28161[11];
  assign add_28173 = {literal_28011, x_bexp} + 6'h01;
  assign sub_28174 = {literal_28035, rounding_carry} - {literal_28011, leading_zeroes};
  assign fraction_is_zero = add_28064 == 13'h0000 & ~(shrl_28051[1] | shrl_28051[2]) & ~(shrl_28051[0] | sticky);
  assign wide_exponent_associative_element = {literal_28011, add_28173};
  assign wide_exponent_associative_element__1 = {{2{sub_28174[4]}}, sub_28174};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {7{~fraction_is_zero}};
  assign MAX_EXPONENT = 5'h1f;
  assign literal_28187 = 10'h000;
  assign wide_exponent__2 = wide_exponent__1[5:0] & {6{~wide_exponent__1[6]}};
  assign eq_28189 = x_bexp == MAX_EXPONENT;
  assign eq_28190 = x_fraction == literal_28187;
  assign eq_28191 = y_bexp == MAX_EXPONENT;
  assign eq_28192 = y_fraction == literal_28187;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_28189 & eq_28190 | eq_28191 & eq_28192;
  assign and_reduce_28210 = &wide_exponent__2[4:0];
  assign has_pos_inf = ~(~eq_28189 | ~eq_28190 | x_sign) | ~(~eq_28191 | ~eq_28192 | y_sign);
  assign has_neg_inf = eq_28189 & eq_28190 & x_sign | eq_28191 & eq_28192 & y_sign;
  assign rounded_fraction = {add_28161, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_28223 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_28189 | eq_28190) | ~(~eq_28191 | eq_28192) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_28064[12], fraction_is_zero}, x_sign & y_sign, ~y_sign, y_sign);
  assign result_fraction = shrl_28223[9:0];
  assign sign_ext_28229 = {10{~(is_operand_inf | wide_exponent__2[5] | and_reduce_28210 | ~((|wide_exponent__2[5:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_28229;
  assign FRACTION_HIGH_BIT = 10'h200;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[5] | and_reduce_28210 ? MAX_EXPONENT : wide_exponent__2[4:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule