module __std__clzt_pow2_16(
  input wire [15:0] value,
  output wire [4:0] out
);
  function automatic [1:0] priority_sel_2b_4way (input reg [3:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] case2, input reg [1:0] case3, input reg [1:0] default_value);
    begin
      casez (sel)
        4'b???1: begin
          priority_sel_2b_4way = case0;
        end
        4'b??10: begin
          priority_sel_2b_4way = case1;
        end
        4'b?100: begin
          priority_sel_2b_4way = case2;
        end
        4'b1000: begin
          priority_sel_2b_4way = case3;
        end
        4'b0000: begin
          priority_sel_2b_4way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_4way = 2'dx;
        end
      endcase
    end
  endfunction
  wire nor_951;
  wire nor_953;
  wire nor_959;
  wire and_960;
  wire and_961;
  wire nor_963;
  wire and_964;
  wire and_965;
  wire and_966;
  wire and_969;
  wire nor_970;
  wire nor_971;
  wire and_981;
  wire and_983;
  wire and_984;
  wire literal_988;
  wire literal_986;
  wire nor_1000;
  wire [1:0] priority_sel_1024;
  assign nor_951 = ~(value[13] | value[12]);
  assign nor_953 = ~(value[9] | value[8]);
  assign nor_959 = ~(value[5] | value[4]);
  assign and_960 = ~(value[15] | value[14]) & nor_951;
  assign and_961 = ~(value[11] | value[10]) & nor_953;
  assign nor_963 = ~(value[1] | value[0]);
  assign and_964 = ~(value[7] | value[6]) & nor_959;
  assign and_965 = and_960 & and_961;
  assign and_966 = ~(value[3] | value[2]) & nor_963;
  assign and_969 = and_964 & and_966;
  assign nor_970 = ~(~and_964 | and_966);
  assign nor_971 = ~(~and_965 | and_969);
  assign and_981 = and_965 & and_969;
  assign and_983 = nor_971 & ~nor_970;
  assign and_984 = nor_971 & nor_970;
  assign literal_988 = 1'h0;
  assign literal_986 = 1'h1;
  assign nor_1000 = ~(~and_960 | and_961);
  assign priority_sel_1024 = priority_sel_2b_4way({nor_1000, and_983, and_984, and_981}, 2'h0, ~(value[3] | value[2] | nor_963) ? {literal_986, ~(value[1] | ~value[0])} : {literal_988, ~(value[3] | ~value[2])}, ~(value[7] | value[6] | nor_959) ? {literal_986, ~(value[5] | ~value[4])} : {literal_988, ~(value[7] | ~value[6])}, ~(value[11] | value[10] | nor_953) ? {literal_986, ~(value[9] | ~value[8])} : {literal_988, ~(value[11] | ~value[10])}, ~(value[15] | value[14] | nor_951) ? {literal_986, ~(value[13] | ~value[12])} : {literal_988, ~(value[15] | ~value[14])});
  assign out = {and_981, nor_971, and_984 & ~and_981 | nor_1000 & ~and_983 & ~and_984 & ~and_981, priority_sel_1024};
endmodule