module __bfloat16__sub(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire [15:0] out
);
  function automatic [1:0] priority_sel_2b_2way (input reg [1:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_2b_2way = case0;
        end
        2'b10: begin
          priority_sel_2b_2way = case1;
        end
        2'b00: begin
          priority_sel_2b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_2way = 2'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [7:0] y_bexp__2;
  wire literal_28028;
  wire [7:0] x_bexp__2;
  wire [7:0] y__1_bexpnot__1;
  wire [8:0] x_bexp_extended__2;
  wire [8:0] y__1_bexpnot_extended__1;
  wire [8:0] full_result;
  wire overflow_detected;
  wire [6:0] y_fraction__2;
  wire [6:0] tuple_index_28036;
  wire [7:0] x_bexp__3;
  wire [7:0] literal_28038;
  wire [7:0] y_bexp__3;
  wire literal_28040;
  wire [6:0] x_fraction__1;
  wire [6:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [7:0] fraction_x;
  wire [7:0] fraction_y;
  wire [7:0] sign_ext_28050;
  wire [7:0] narrowed_result;
  wire [7:0] x_bexpor_mask__1;
  wire [6:0] literal_28053;
  wire tuple_index_28055;
  wire [7:0] fraction_x__1;
  wire [7:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [7:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [8:0] wide_x_squeezed;
  wire [10:0] wide_y_shift_bits;
  wire [7:0] shift;
  wire [10:0] shrl_28069;
  wire [11:0] shll_28071;
  wire [8:0] xddend_x__2_squeezed;
  wire [1:0] literal_28073;
  wire [9:0] add_28081;
  wire sticky;
  wire [11:0] concat_28087;
  wire [11:0] xbs_fraction__1;
  wire carry_bit;
  wire nor_28108;
  wire nor_28110;
  wire and_28121;
  wire nor_28117;
  wire nor_28118;
  wire and_28134;
  wire and_28130;
  wire [2:0] concat_28142;
  wire [2:0] concat_28141;
  wire [3:0] concat_28146;
  wire [3:0] leading_zeroes;
  wire [12:0] cancel_fraction;
  wire [10:0] cancel_fraction__1;
  wire [10:0] carry_fraction__1;
  wire [10:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [2:0] fraction_shift__3;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [8:0] add_28166;
  wire rounding_carry;
  wire [8:0] add_28179;
  wire [4:0] sub_28180;
  wire fraction_is_zero;
  wire [9:0] wide_exponent_associative_element;
  wire [9:0] wide_exponent_associative_element__1;
  wire [9:0] wide_exponent;
  wire [9:0] wide_exponent__1;
  wire [7:0] MAX_EXPONENT;
  wire [8:0] wide_exponent__2;
  wire eq_28194;
  wire eq_28195;
  wire eq_28196;
  wire eq_28197;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_28215;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [11:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [11:0] shrl_28228;
  wire is_result_nan;
  wire result_sign;
  wire [6:0] result_fraction;
  wire [6:0] sign_ext_28234;
  wire result_sign__1;
  wire [6:0] result_fraction__3;
  wire [6:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [7:0] result_exponent__2;
  wire [6:0] result_fraction__4;
  assign y_bexp__2 = y[14:7];
  assign literal_28028 = 1'h0;
  assign x_bexp__2 = x[14:7];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {literal_28028, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {literal_28028, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[8];
  assign y_fraction__2 = y[6:0];
  assign tuple_index_28036 = x[6:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign literal_28038 = 8'h00;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign literal_28040 = 1'h1;
  assign x_fraction__1 = overflow_detected ? tuple_index_28036 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_28036;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[15:15];
  assign fraction_x = {literal_28040, x_fraction__1};
  assign fraction_y = {literal_28040, y_fraction__3};
  assign sign_ext_28050 = {8{y_bexp__3 != literal_28038}};
  assign narrowed_result = full_result[7:0];
  assign x_bexpor_mask__1 = {8{nc}};
  assign literal_28053 = 7'h00;
  assign tuple_index_28055 = x[15:15];
  assign fraction_x__1 = fraction_x & {8{x_bexp__3 != literal_28038}};
  assign fraction_y__1 = fraction_y & sign_ext_28050;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_28055 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_28055;
  assign wide_x_squeezed = {literal_28028, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {literal_28053, overflow_detected};
  assign shrl_28069 = shift >= 8'h0b ? 11'h000 : wide_y_shift_bits >> shift;
  assign shll_28071 = shift >= 8'h0c ? 12'h000 : 12'hfff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign literal_28073 = 2'h0;
  assign add_28081 = {{1{xddend_x__2_squeezed[8]}}, xddend_x__2_squeezed} + {literal_28073, shrl_28069[10:3]};
  assign sticky = ~({literal_28028, ~y_fraction__3} | ~sign_ext_28050 | shll_28071[10:3]) != literal_28038;
  assign concat_28087 = {add_28081[8:0], shrl_28069[2:1], shrl_28069[0] | sticky};
  assign xbs_fraction__1 = add_28081[9] ? -concat_28087 : concat_28087;
  assign carry_bit = xbs_fraction__1[11];
  assign nor_28108 = ~(xbs_fraction__1[9] | xbs_fraction__1[8]);
  assign nor_28110 = ~(xbs_fraction__1[5] | xbs_fraction__1[4]);
  assign and_28121 = ~(carry_bit | xbs_fraction__1[10]) & nor_28108;
  assign nor_28117 = ~(xbs_fraction__1[1] | xbs_fraction__1[0]);
  assign nor_28118 = ~(xbs_fraction__1[3] | xbs_fraction__1[2]);
  assign and_28134 = ~(xbs_fraction__1[7] | xbs_fraction__1[6]) & nor_28110;
  assign and_28130 = nor_28118 & nor_28117;
  assign concat_28142 = {literal_28028, ~(carry_bit | xbs_fraction__1[10] | nor_28108) ? {literal_28040, ~(xbs_fraction__1[9] | ~xbs_fraction__1[8])} : {literal_28028, ~(carry_bit | ~xbs_fraction__1[10])}};
  assign concat_28141 = {literal_28040, ~(xbs_fraction__1[7] | xbs_fraction__1[6] | nor_28110) ? {literal_28040, ~(xbs_fraction__1[5] | ~xbs_fraction__1[4])} : {literal_28028, ~(xbs_fraction__1[7] | ~xbs_fraction__1[6])}};
  assign concat_28146 = {literal_28040, and_28130, priority_sel_2b_2way({~(xbs_fraction__1[3] | xbs_fraction__1[2] | nor_28117), and_28130}, literal_28073, {literal_28040, ~(xbs_fraction__1[1] | ~xbs_fraction__1[0])}, {nor_28118, ~(xbs_fraction__1[3] | ~xbs_fraction__1[2])})};
  assign leading_zeroes = and_28121 & and_28134 ? concat_28146 : {literal_28028, ~(~and_28121 | and_28134) ? concat_28141 : concat_28142};
  assign cancel_fraction = leading_zeroes >= 4'hd ? 13'h0000 : {literal_28028, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[11:1];
  assign carry_fraction__1 = {xbs_fraction__1[11:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign fraction_shift__3 = 3'h4;
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_28166 = {literal_28028, shifted_fraction[10:3]} + {literal_28038, do_round_up};
  assign rounding_carry = add_28166[8];
  assign add_28179 = {literal_28028, x_bexp__3} + 9'h001;
  assign sub_28180 = {4'h0, rounding_carry} - {literal_28028, leading_zeroes};
  assign fraction_is_zero = add_28081 == 10'h000 & ~(shrl_28069[1] | shrl_28069[2]) & ~(shrl_28069[0] | sticky);
  assign wide_exponent_associative_element = {literal_28028, add_28179};
  assign wide_exponent_associative_element__1 = {{5{sub_28180[4]}}, sub_28180};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {10{~fraction_is_zero}};
  assign MAX_EXPONENT = 8'hff;
  assign wide_exponent__2 = wide_exponent__1[8:0] & {9{~wide_exponent__1[9]}};
  assign eq_28194 = x_bexp__3 == MAX_EXPONENT;
  assign eq_28195 = x_fraction__1 == literal_28053;
  assign eq_28196 = y_bexp__3 == MAX_EXPONENT;
  assign eq_28197 = y_fraction__3 == literal_28053;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_28194 & eq_28195 | eq_28196 & eq_28197;
  assign and_reduce_28215 = &wide_exponent__2[7:0];
  assign has_pos_inf = ~(~eq_28194 | ~eq_28195 | x_sign__1) | ~(~eq_28196 | ~eq_28197 | y_sign__3);
  assign has_neg_inf = eq_28194 & eq_28195 & x_sign__1 | eq_28196 & eq_28197 & y_sign__3;
  assign rounded_fraction = {add_28166, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_28228 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_28194 | eq_28195) | ~(~eq_28196 | eq_28197) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_28081[9], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_28228[6:0];
  assign sign_ext_28234 = {7{~(is_operand_inf | wide_exponent__2[8] | and_reduce_28215 | ~((|wide_exponent__2[8:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_28234;
  assign FRACTION_HIGH_BIT = 7'h40;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[8] | and_reduce_28215 ? MAX_EXPONENT : wide_exponent__2[7:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule