module __hfloat16__gte_2(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire out
);
  function automatic priority_sel_1b_3way (input reg [2:0] sel, input reg case0, input reg case1, input reg case2, input reg default_value);
    begin
      casez (sel)
        3'b??1: begin
          priority_sel_1b_3way = case0;
        end
        3'b?10: begin
          priority_sel_1b_3way = case1;
        end
        3'b100: begin
          priority_sel_1b_3way = case2;
        end
        3'b000: begin
          priority_sel_1b_3way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_3way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [4:0] x_bexp__2;
  wire [4:0] literal_585;
  wire [4:0] y_bexp__1;
  wire eq_587;
  wire eq_588;
  wire [9:0] x_fraction__2;
  wire [9:0] y_fraction__2;
  wire [4:0] literal_595;
  wire [9:0] literal_596;
  wire x_sign__1;
  wire y_sign__2;
  wire [9:0] x__1_fraction__1;
  wire [9:0] y__1_fraction__1;
  wire eq_605;
  wire eq_exp;
  wire gt_fraction;
  wire and_609;
  wire and_610;
  wire and_612;
  wire gt_exp;
  wire nor_615;
  wire abs_gt;
  wire and_631;
  wire result;
  wire and_634;
  assign x_bexp__2 = x[14:10];
  assign literal_585 = 5'h00;
  assign y_bexp__1 = y[14:10];
  assign eq_587 = x_bexp__2 == literal_585;
  assign eq_588 = y_bexp__1 == literal_585;
  assign x_fraction__2 = x[9:0];
  assign y_fraction__2 = y[9:0];
  assign literal_595 = 5'h1f;
  assign literal_596 = 10'h000;
  assign x_sign__1 = x[15:15];
  assign y_sign__2 = y[15:15];
  assign x__1_fraction__1 = x_fraction__2 & {10{~eq_587}};
  assign y__1_fraction__1 = y_fraction__2 & {10{~eq_588}};
  assign eq_605 = x_sign__1 == y_sign__2;
  assign eq_exp = x_bexp__2 == y_bexp__1;
  assign gt_fraction = x__1_fraction__1 > y__1_fraction__1;
  assign and_609 = x_bexp__2 == literal_595 & x_fraction__2 != literal_596;
  assign and_610 = y_bexp__1 == literal_595 & y_fraction__2 != literal_596;
  assign and_612 = eq_587 & eq_588;
  assign gt_exp = x_bexp__2 > y_bexp__1;
  assign nor_615 = ~(and_609 | and_610);
  assign abs_gt = gt_exp | eq_exp & gt_fraction;
  assign and_631 = ~abs_gt & ~(nor_615 & (eq_605 & eq_exp & x__1_fraction__1 == y__1_fraction__1 | and_612));
  assign result = priority_sel_1b_3way({~(~x_sign__1 | y_sign__2), ~(x_sign__1 | ~y_sign__2), ~(x_sign__1 | y_sign__2)}, abs_gt, 1'h1, 1'h0, and_631);
  assign and_634 = nor_615 & (eq_605 & eq_exp & x_fraction__2 == y_fraction__2 | and_612);
  assign out = ~and_634 & ~(and_609 | and_610 | ~result) | and_634;
endmodule