module __bfloat16__sub(
  input wire [15:0] x,
  input wire [15:0] y,
  output wire [15:0] out
);
  function automatic [1:0] priority_sel_2b_2way (input reg [1:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_2b_2way = case0;
        end
        2'b10: begin
          priority_sel_2b_2way = case1;
        end
        2'b00: begin
          priority_sel_2b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_2way = 2'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [7:0] y_bexp__2;
  wire [7:0] x_bexp__2;
  wire [7:0] y__1_bexpnot__1;
  wire [8:0] x_bexp_extended__2;
  wire [8:0] y__1_bexpnot_extended__1;
  wire [8:0] full_result;
  wire overflow_detected;
  wire [6:0] y_fraction__2;
  wire [6:0] tuple_index_30554;
  wire [7:0] x_bexp__3;
  wire [7:0] y_bexp__3;
  wire [6:0] x_fraction__1;
  wire [6:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [7:0] fraction_x;
  wire [7:0] fraction_y;
  wire [7:0] sign_ext_30568;
  wire [7:0] narrowed_result;
  wire [7:0] x_bexpor_mask__1;
  wire tuple_index_30573;
  wire [7:0] fraction_x__1;
  wire [7:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [7:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [8:0] wide_x_squeezed;
  wire [10:0] wide_y_shift_bits;
  wire [7:0] shift;
  wire [10:0] shrl_30587;
  wire [11:0] shll_30589;
  wire [8:0] xddend_x__2_squeezed;
  wire [9:0] add_30599;
  wire sticky;
  wire [11:0] concat_30605;
  wire [11:0] xbs_fraction__1;
  wire carry_bit;
  wire nor_30626;
  wire nor_30628;
  wire and_30639;
  wire nor_30635;
  wire nor_30636;
  wire and_30652;
  wire and_30648;
  wire [2:0] concat_30660;
  wire [2:0] concat_30659;
  wire [3:0] concat_30664;
  wire [3:0] leading_zeroes;
  wire [12:0] cancel_fraction;
  wire [10:0] cancel_fraction__1;
  wire [10:0] carry_fraction__1;
  wire [10:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [2:0] fraction_shift__3;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [8:0] add_30684;
  wire rounding_carry;
  wire [8:0] add_30697;
  wire [4:0] sub_30698;
  wire fraction_is_zero;
  wire [9:0] wide_exponent_associative_element;
  wire [9:0] wide_exponent_associative_element__1;
  wire [9:0] wide_exponent;
  wire [9:0] wide_exponent__1;
  wire [7:0] MAX_EXPONENT;
  wire [8:0] wide_exponent__2;
  wire eq_30712;
  wire eq_30713;
  wire eq_30714;
  wire eq_30715;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_30733;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [11:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [11:0] shrl_30746;
  wire is_result_nan;
  wire result_sign;
  wire [6:0] result_fraction;
  wire [6:0] sign_ext_30752;
  wire result_sign__1;
  wire [6:0] result_fraction__3;
  wire [6:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [7:0] result_exponent__2;
  wire [6:0] result_fraction__4;
  assign y_bexp__2 = y[14:7];
  assign x_bexp__2 = x[14:7];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {1'h0, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {1'h0, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[8];
  assign y_fraction__2 = y[6:0];
  assign tuple_index_30554 = x[6:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign x_fraction__1 = overflow_detected ? tuple_index_30554 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_30554;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[15:15];
  assign fraction_x = {1'h1, x_fraction__1};
  assign fraction_y = {1'h1, y_fraction__3};
  assign sign_ext_30568 = {8{y_bexp__3 != 8'h00}};
  assign narrowed_result = full_result[7:0];
  assign x_bexpor_mask__1 = {8{nc}};
  assign tuple_index_30573 = x[15:15];
  assign fraction_x__1 = fraction_x & {8{x_bexp__3 != 8'h00}};
  assign fraction_y__1 = fraction_y & sign_ext_30568;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_30573 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_30573;
  assign wide_x_squeezed = {1'h0, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {7'h00, overflow_detected};
  assign shrl_30587 = shift >= 8'h0b ? 11'h000 : wide_y_shift_bits >> shift;
  assign shll_30589 = shift >= 8'h0c ? 12'h000 : 12'hfff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign add_30599 = {{1{xddend_x__2_squeezed[8]}}, xddend_x__2_squeezed} + {2'h0, shrl_30587[10:3]};
  assign sticky = ~({1'h0, ~y_fraction__3} | ~sign_ext_30568 | shll_30589[10:3]) != 8'h00;
  assign concat_30605 = {add_30599[8:0], shrl_30587[2:1], shrl_30587[0] | sticky};
  assign xbs_fraction__1 = add_30599[9] ? -concat_30605 : concat_30605;
  assign carry_bit = xbs_fraction__1[11];
  assign nor_30626 = ~(xbs_fraction__1[9] | xbs_fraction__1[8]);
  assign nor_30628 = ~(xbs_fraction__1[5] | xbs_fraction__1[4]);
  assign and_30639 = ~(carry_bit | xbs_fraction__1[10]) & nor_30626;
  assign nor_30635 = ~(xbs_fraction__1[1] | xbs_fraction__1[0]);
  assign nor_30636 = ~(xbs_fraction__1[3] | xbs_fraction__1[2]);
  assign and_30652 = ~(xbs_fraction__1[7] | xbs_fraction__1[6]) & nor_30628;
  assign and_30648 = nor_30636 & nor_30635;
  assign concat_30660 = {1'h0, ~(carry_bit | xbs_fraction__1[10] | nor_30626) ? {1'h1, ~(xbs_fraction__1[9] | ~xbs_fraction__1[8])} : {1'h0, ~(carry_bit | ~xbs_fraction__1[10])}};
  assign concat_30659 = {1'h1, ~(xbs_fraction__1[7] | xbs_fraction__1[6] | nor_30628) ? {1'h1, ~(xbs_fraction__1[5] | ~xbs_fraction__1[4])} : {1'h0, ~(xbs_fraction__1[7] | ~xbs_fraction__1[6])}};
  assign concat_30664 = {1'h1, and_30648, priority_sel_2b_2way({~(xbs_fraction__1[3] | xbs_fraction__1[2] | nor_30635), and_30648}, 2'h0, {1'h1, ~(xbs_fraction__1[1] | ~xbs_fraction__1[0])}, {nor_30636, ~(xbs_fraction__1[3] | ~xbs_fraction__1[2])})};
  assign leading_zeroes = and_30639 & and_30652 ? concat_30664 : {1'h0, ~(~and_30639 | and_30652) ? concat_30659 : concat_30660};
  assign cancel_fraction = leading_zeroes >= 4'hd ? 13'h0000 : {1'h0, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[11:1];
  assign carry_fraction__1 = {xbs_fraction__1[11:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign fraction_shift__3 = 3'h4;
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_30684 = {1'h0, shifted_fraction[10:3]} + {8'h00, do_round_up};
  assign rounding_carry = add_30684[8];
  assign add_30697 = {1'h0, x_bexp__3} + 9'h001;
  assign sub_30698 = {4'h0, rounding_carry} - {1'h0, leading_zeroes};
  assign fraction_is_zero = add_30599 == 10'h000 & ~(shrl_30587[1] | shrl_30587[2]) & ~(shrl_30587[0] | sticky);
  assign wide_exponent_associative_element = {1'h0, add_30697};
  assign wide_exponent_associative_element__1 = {{5{sub_30698[4]}}, sub_30698};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {10{~fraction_is_zero}};
  assign MAX_EXPONENT = 8'hff;
  assign wide_exponent__2 = wide_exponent__1[8:0] & {9{~wide_exponent__1[9]}};
  assign eq_30712 = x_bexp__3 == MAX_EXPONENT;
  assign eq_30713 = x_fraction__1 == 7'h00;
  assign eq_30714 = y_bexp__3 == MAX_EXPONENT;
  assign eq_30715 = y_fraction__3 == 7'h00;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_30712 & eq_30713 | eq_30714 & eq_30715;
  assign and_reduce_30733 = &wide_exponent__2[7:0];
  assign has_pos_inf = ~(~eq_30712 | ~eq_30713 | x_sign__1) | ~(~eq_30714 | ~eq_30715 | y_sign__3);
  assign has_neg_inf = eq_30712 & eq_30713 & x_sign__1 | eq_30714 & eq_30715 & y_sign__3;
  assign rounded_fraction = {add_30684, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_30746 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_30712 | eq_30713) | ~(~eq_30714 | eq_30715) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_30599[9], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_30746[6:0];
  assign sign_ext_30752 = {7{~(is_operand_inf | wide_exponent__2[8] | and_reduce_30733 | ~((|wide_exponent__2[8:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_30752;
  assign FRACTION_HIGH_BIT = 7'h40;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[8] | and_reduce_30733 ? MAX_EXPONENT : wide_exponent__2[7:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule