/versions/

Action 5062c7f75ab3e659e7f8a0fa487e4a3605f39a907daf903156e699ee286f3f83

Summary

state: not queued

kind: ir_fn_to_combinational_verilog

subject: ir=2cfe0afa42fe top=__fixed_point__num_bits_overlapping system_verilog=false

crate:v0.6.0dso:v0.7.0driver:crate:v0.6.0

Upstream Dependencies

RoleAction IDStateKindSubjectOutput
ir_action_id2cfe0afa42fe426cd060674e4da31f72c8c9c027388201fc1e294f4083b6f97bdonedriver_ir_to_optir=ace2b9afe75a top=__fixed_point__num_bits_overlappingir_package_file payload/package.opt.ir

Provenance

created_utc: 2026-02-19T23:10:16.805135376+00:00

output artifact: verilog_file relpath=payload/result.v

output path: bvc-artifacts/artifacts/50/62/5062c7f75ab3e659e7f8a0fa487e4a3605f39a907daf903156e699ee286f3f83/payload/result.v

Dependencies
Action IDArtifact TypeRelpathPath
2cfe0afa42fe426cd060674e4da31f72c8c9c027388201fc1e294f4083b6f97bir_package_filepayload/package.opt.irbvc-artifacts/artifacts/2c/fe/2cfe0afa42fe426cd060674e4da31f72c8c9c027388201fc1e294f4083b6f97b/payload/package.opt.ir
Suggested Next Actions
Action IDStateKindSubjectReason
02bc47187c4e10b3570ebce0bc41346e52fdbca34e267b56fd0ae61ccd38bc55donecombo_verilog_to_yosys_abc_aigverilog=5062c7f75ab3 top=__fixed_point__num_bits_overlappingConvert combinational Verilog to AIG with ComboVerilogToYosysAbcAig
Output Files
PathBytesSHA256
result.v103919bbe7862fcc8cc696412c454885600b9287bb26aa4b5d297c0e6685148eaeb9
Executed Commands
#ExitCommand
10
docker run --name xlsynth-bvc-run-5062c7f75ab3e659-1374217-8507 --rm --pull never --network none -v /home/cdleary/proj/xlsynth-bvc/bvc-artifacts/artifacts/2c/fe/2cfe0afa42fe426cd060674e4da31f72c8c9c027388201fc1e294f4083b6f97b/payload/package.opt.ir:/inputs/input.ir:ro -v /home/cdleary/proj/xlsynth-bvc/bvc-artifacts/.staging/5062c7f75ab3e659e7f8a0fa487e4a3605f39a907daf903156e699ee286f3f83-1374217-1771542614943920644/payload:/outputs -v /home/cdleary/proj/xlsynth-bvc/bvc-artifacts/driver-release-cache:/cache:ro -e DELAY_MODEL=unit -e IR_TOP=__fixed_point__num_bits_overlapping -e USE_SYSTEM_VERILOG=false -e VERILOG_EXT=v -e XLSYNTH_PLATFORM=ubuntu2004 -e XLSYNTH_VERSION=v0.7.0 xlsynth-bvc-driver:0.6.0 bash -lc set -euo pipefail

cache_dir="/cache/${XLSYNTH_VERSION}/${XLSYNTH_PLATFORM}"
if [ ! -d "${cache_dir}" ]; then
  echo "missing cached xlsynth release at ${cache_dir}" >&2
  exit 1
fi
rm -rf /tmp/xlsynth-release
mkdir -p /tmp/xlsynth-release
cp -a "${cache_dir}/." /tmp/xlsynth-release/
for ext in so dylib; do
  if [ -f "/tmp/xlsynth-release/libxls-${XLSYNTH_PLATFORM}.${ext}" ]; then
    ln -sf "/tmp/xlsynth-release/libxls-${XLSYNTH_PLATFORM}.${ext}" "/tmp/xlsynth-release/libxls-${XLSYNTH_VERSION}-${XLSYNTH_PLATFORM}.${ext}"
  fi
done
export XLSYNTH_TOOLS=/tmp/xlsynth-release
export LD_LIBRARY_PATH="/tmp/xlsynth-release:${LD_LIBRARY_PATH:-}"

cat > /tmp/xlsynth-toolchain.toml <<'TOML'
[toolchain]
tool_path = "/tmp/xlsynth-release"
TOML
xlsynth-driver --toolchain /tmp/xlsynth-toolchain.toml ir2combo /inputs/input.ir --delay_model "${DELAY_MODEL}" --top "${IR_TOP}" --use_system_verilog "${USE_SYSTEM_VERILOG}" > "/outputs/result.${VERILOG_EXT}"
Details JSON
{
  "crate_version_label": "crate:v0.6.0",
  "delay_model": "unit",
  "driver_runtime": {
    "docker_image": "xlsynth-bvc-driver:0.6.0",
    "dockerfile": "docker/xlsynth-driver.Dockerfile",
    "driver_version": "0.6.0",
    "release_platform": "ubuntu2004"
  },
  "driver_subcommand": "ir2combo",
  "dso_version_label": "dso:v0.7.0",
  "input_ir_fn_structural_hash_error": "docker run failed (exit=Some(2)): error: unrecognized subcommand 'ir-fn-structural-hash'\nstdout:\n\nstderr:\nerror: unrecognized subcommand 'ir-fn-structural-hash'\n\n  tip: a similar subcommand exists: 'ir-fn-eval'\n\nUsage: xlsynth-driver [OPTIONS] [COMMAND]\n\nFor more information, try '--help'.\n",
  "ir_top": "__fixed_point__num_bits_overlapping",
  "use_system_verilog": false,
  "xlsynth_version": "v0.7.0"
}

Action JSON

{
  "action": "ir_fn_to_combinational_verilog",
  "ir_action_id": "2cfe0afa42fe426cd060674e4da31f72c8c9c027388201fc1e294f4083b6f97b",
  "top_fn_name": "__fixed_point__num_bits_overlapping",
  "use_system_verilog": false,
  "version": "v0.7.0",
  "runtime": {
    "driver_version": "0.6.0",
    "release_platform": "ubuntu2004",
    "docker_image": "xlsynth-bvc-driver:0.6.0",
    "dockerfile": "docker/xlsynth-driver.Dockerfile"
  }
}