module __bfloat16__from_float32(
  input wire [31:0] f32,
  output wire [15:0] out
);
  function automatic [7:0] priority_sel_8b_2way (input reg [1:0] sel, input reg [7:0] case0, input reg [7:0] case1, input reg [7:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_8b_2way = case0;
        end
        2'b10: begin
          priority_sel_8b_2way = case1;
        end
        2'b00: begin
          priority_sel_8b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_8b_2way = 8'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [22:0] f32_fraction__1;
  wire round_bit;
  wire sticky;
  wire [6:0] truncated_fraction;
  wire round_up;
  wire renormalize;
  wire [7:0] f32_bexp__2;
  wire eq_1704;
  wire [7:0] INF_EXP;
  wire [7:0] f32_cast_bexp__2;
  wire eq_1710;
  wire eq_1711;
  wire [6:0] f32_cast_fraction__1;
  wire nor_1721;
  wire [6:0] and_1722;
  wire [7:0] x_bexp__1;
  wire f32_sign__2;
  wire [6:0] concat_1737;
  wire x_sign;
  assign f32_fraction__1 = f32[22:0];
  assign round_bit = f32_fraction__1[15];
  assign sticky = f32_fraction__1[14:0] != 15'h0000;
  assign truncated_fraction = f32_fraction__1[22:16];
  assign round_up = round_bit & sticky | round_bit & f32_fraction__1[16];
  assign renormalize = round_up & (&truncated_fraction);
  assign f32_bexp__2 = f32[30:23];
  assign eq_1704 = f32_bexp__2 == 8'h00;
  assign INF_EXP = 8'hff;
  assign f32_cast_bexp__2 = f32_bexp__2 + {7'h00, renormalize};
  assign eq_1710 = f32_fraction__1 == 23'h00_0000;
  assign eq_1711 = f32_bexp__2 == INF_EXP;
  assign f32_cast_fraction__1 = truncated_fraction + {6'h00, round_up};
  assign nor_1721 = ~(~eq_1711 | eq_1710);
  assign and_1722 = f32_cast_fraction__1 & {7{f32_cast_bexp__2 != INF_EXP}};
  assign x_bexp__1 = priority_sel_8b_2way({eq_1704, eq_1711}, INF_EXP, 8'h00, f32_cast_bexp__2);
  assign f32_sign__2 = f32[31:31];
  assign concat_1737 = {priority_sel_1b_2way({~(~eq_1704 | eq_1710) | eq_1704 & eq_1710 | eq_1711 & eq_1710, nor_1721}, 1'h1, 1'h0, and_1722[6]), and_1722[5:0] & {6{~(eq_1711 | eq_1704)}}};
  assign x_sign = ~(nor_1721 | ~f32_sign__2);
  assign out = {x_sign, x_bexp__1, concat_1737 & {7{x_bexp__1 != 8'h00}}};
endmodule