module __float64__sub(
  input wire [63:0] x,
  input wire [63:0] y,
  output wire [63:0] out
);
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [1:0] priority_sel_2b_2way (input reg [1:0] sel, input reg [1:0] case0, input reg [1:0] case1, input reg [1:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_2b_2way = case0;
        end
        2'b10: begin
          priority_sel_2b_2way = case1;
        end
        2'b00: begin
          priority_sel_2b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_2b_2way = 2'dx;
        end
      endcase
    end
  endfunction
  function automatic priority_sel_1b_4way (input reg [3:0] sel, input reg case0, input reg case1, input reg case2, input reg case3, input reg default_value);
    begin
      casez (sel)
        4'b???1: begin
          priority_sel_1b_4way = case0;
        end
        4'b??10: begin
          priority_sel_1b_4way = case1;
        end
        4'b?100: begin
          priority_sel_1b_4way = case2;
        end
        4'b1000: begin
          priority_sel_1b_4way = case3;
        end
        4'b0000: begin
          priority_sel_1b_4way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_4way = 1'dx;
        end
      endcase
    end
  endfunction
  function automatic [2:0] priority_sel_3b_2way (input reg [1:0] sel, input reg [2:0] case0, input reg [2:0] case1, input reg [2:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_3b_2way = case0;
        end
        2'b10: begin
          priority_sel_3b_2way = case1;
        end
        2'b00: begin
          priority_sel_3b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_3b_2way = 3'dx;
        end
      endcase
    end
  endfunction
  function automatic [3:0] priority_sel_4b_2way (input reg [1:0] sel, input reg [3:0] case0, input reg [3:0] case1, input reg [3:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_4b_2way = case0;
        end
        2'b10: begin
          priority_sel_4b_2way = case1;
        end
        2'b00: begin
          priority_sel_4b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_4b_2way = 4'dx;
        end
      endcase
    end
  endfunction
  function automatic [4:0] priority_sel_5b_2way (input reg [1:0] sel, input reg [4:0] case0, input reg [4:0] case1, input reg [4:0] default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_5b_2way = case0;
        end
        2'b10: begin
          priority_sel_5b_2way = case1;
        end
        2'b00: begin
          priority_sel_5b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_5b_2way = 5'dx;
        end
      endcase
    end
  endfunction
  wire [10:0] y_bexp__2;
  wire literal_31087;
  wire [10:0] x_bexp__2;
  wire [10:0] y__1_bexpnot__1;
  wire [11:0] x_bexp_extended__2;
  wire [11:0] y__1_bexpnot_extended__1;
  wire [11:0] full_result;
  wire overflow_detected;
  wire [51:0] y_fraction__2;
  wire [51:0] tuple_index_31095;
  wire [10:0] x_bexp__3;
  wire [10:0] literal_31097;
  wire [10:0] y_bexp__3;
  wire literal_31099;
  wire [51:0] x_fraction__1;
  wire [51:0] y_fraction__3;
  wire nc;
  wire y_sign__2;
  wire [52:0] fraction_x;
  wire [52:0] fraction_y;
  wire [52:0] sign_ext_31109;
  wire [10:0] narrowed_result;
  wire [10:0] x_bexpor_mask__1;
  wire tuple_index_31114;
  wire [52:0] fraction_x__1;
  wire [52:0] fraction_y__1;
  wire [2:0] xddend_x__2_squeezed_const_lsb_bits;
  wire [10:0] result;
  wire x_sign__1;
  wire y_sign__3;
  wire [53:0] wide_x_squeezed;
  wire [55:0] wide_y_shift_bits;
  wire [10:0] shift;
  wire [55:0] shrl_31128;
  wire [56:0] shll_31130;
  wire [53:0] xddend_x__2_squeezed;
  wire [52:0] literal_31140;
  wire [54:0] add_31141;
  wire sticky;
  wire [56:0] concat_31147;
  wire [56:0] xbs_fraction__1;
  wire nor_31160;
  wire nor_31166;
  wire and_31191;
  wire nor_31193;
  wire carry_bit;
  wire and_31201;
  wire nor_31203;
  wire and_31242;
  wire nor_31243;
  wire nor_31245;
  wire and_31252;
  wire nor_31253;
  wire nor_31255;
  wire nor_31229;
  wire nor_31230;
  wire nor_31235;
  wire nor_31236;
  wire nor_31225;
  wire nor_31226;
  wire nor_31216;
  wire nor_31217;
  wire nor_31286;
  wire nor_31287;
  wire and_31289;
  wire nor_31290;
  wire nor_31297;
  wire nor_31298;
  wire and_31300;
  wire nor_31301;
  wire and_31277;
  wire nor_31279;
  wire and_31282;
  wire nor_31283;
  wire and_31274;
  wire nor_31275;
  wire nor_31269;
  wire nor_31271;
  wire and_31265;
  wire nor_31266;
  wire nor_31260;
  wire nor_31262;
  wire and_31330;
  wire and_31331;
  wire and_31333;
  wire and_31334;
  wire and_31342;
  wire and_31343;
  wire and_31345;
  wire and_31346;
  wire and_31366;
  wire nor_31368;
  wire priority_sel_31376;
  wire and_31378;
  wire nor_31380;
  wire priority_sel_31388;
  wire and_31363;
  wire [1:0] priority_sel_31364;
  wire and_31359;
  wire and_31355;
  wire [2:0] concat_31411;
  wire [2:0] concat_31423;
  wire [2:0] concat_31399;
  wire [2:0] concat_31396;
  wire [2:0] concat_31395;
  wire [2:0] concat_31393;
  wire [2:0] concat_31392;
  wire and_31432;
  wire and_31438;
  wire and_31429;
  wire [2:0] fraction_shift__3;
  wire [3:0] literal_31450;
  wire and_31459;
  wire [3:0] priority_sel_31460;
  wire [3:0] priority_sel_31461;
  wire [3:0] sel_31573;
  wire [4:0] concat_31463;
  wire [5:0] leading_zeroes;
  wire [57:0] cancel_fraction;
  wire [55:0] cancel_fraction__1;
  wire [55:0] carry_fraction__1;
  wire [55:0] shifted_fraction;
  wire [2:0] normal_chunk;
  wire [1:0] half_way_chunk;
  wire do_round_up;
  wire [53:0] add_31491;
  wire rounding_carry;
  wire [11:0] add_31504;
  wire [6:0] sub_31505;
  wire fraction_is_zero;
  wire [12:0] wide_exponent_associative_element;
  wire [12:0] wide_exponent_associative_element__1;
  wire [12:0] wide_exponent;
  wire [12:0] wide_exponent__1;
  wire [10:0] MAX_EXPONENT;
  wire [51:0] literal_31518;
  wire [11:0] wide_exponent__2;
  wire eq_31520;
  wire eq_31521;
  wire eq_31522;
  wire eq_31523;
  wire [2:0] fraction_shift__2;
  wire is_operand_inf;
  wire and_reduce_31541;
  wire has_pos_inf;
  wire has_neg_inf;
  wire [56:0] rounded_fraction;
  wire [2:0] fraction_shift__1;
  wire [56:0] shrl_31554;
  wire is_result_nan;
  wire result_sign;
  wire [51:0] result_fraction;
  wire [51:0] sign_ext_31560;
  wire result_sign__1;
  wire [51:0] result_fraction__3;
  wire [51:0] FRACTION_HIGH_BIT;
  wire result_sign__2;
  wire [10:0] result_exponent__2;
  wire [51:0] result_fraction__4;
  assign y_bexp__2 = y[62:52];
  assign literal_31087 = 1'h0;
  assign x_bexp__2 = x[62:52];
  assign y__1_bexpnot__1 = ~y_bexp__2;
  assign x_bexp_extended__2 = {literal_31087, x_bexp__2};
  assign y__1_bexpnot_extended__1 = {literal_31087, y__1_bexpnot__1};
  assign full_result = x_bexp_extended__2 + y__1_bexpnot_extended__1;
  assign overflow_detected = full_result[11];
  assign y_fraction__2 = y[51:0];
  assign tuple_index_31095 = x[51:0];
  assign x_bexp__3 = overflow_detected ? x_bexp__2 : y_bexp__2;
  assign literal_31097 = 11'h000;
  assign y_bexp__3 = overflow_detected ? y_bexp__2 : x_bexp__2;
  assign literal_31099 = 1'h1;
  assign x_fraction__1 = overflow_detected ? tuple_index_31095 : y_fraction__2;
  assign y_fraction__3 = overflow_detected ? y_fraction__2 : tuple_index_31095;
  assign nc = ~overflow_detected;
  assign y_sign__2 = y[63:63];
  assign fraction_x = {literal_31099, x_fraction__1};
  assign fraction_y = {literal_31099, y_fraction__3};
  assign sign_ext_31109 = {53{y_bexp__3 != literal_31097}};
  assign narrowed_result = full_result[10:0];
  assign x_bexpor_mask__1 = {11{nc}};
  assign tuple_index_31114 = x[63:63];
  assign fraction_x__1 = fraction_x & {53{x_bexp__3 != literal_31097}};
  assign fraction_y__1 = fraction_y & sign_ext_31109;
  assign xddend_x__2_squeezed_const_lsb_bits = 3'h0;
  assign result = narrowed_result ^ x_bexpor_mask__1;
  assign x_sign__1 = overflow_detected ? tuple_index_31114 : ~y_sign__2;
  assign y_sign__3 = overflow_detected ? ~y_sign__2 : tuple_index_31114;
  assign wide_x_squeezed = {literal_31087, fraction_x__1};
  assign wide_y_shift_bits = {fraction_y__1, xddend_x__2_squeezed_const_lsb_bits};
  assign shift = result + {10'h000, overflow_detected};
  assign shrl_31128 = shift >= 11'h038 ? 56'h00_0000_0000_0000 : wide_y_shift_bits >> shift;
  assign shll_31130 = shift >= 11'h039 ? 57'h000_0000_0000_0000 : 57'h1ff_ffff_ffff_ffff << shift;
  assign xddend_x__2_squeezed = x_sign__1 ^ y_sign__3 ? -wide_x_squeezed : wide_x_squeezed;
  assign literal_31140 = 53'h00_0000_0000_0000;
  assign add_31141 = {{1{xddend_x__2_squeezed[53]}}, xddend_x__2_squeezed} + {2'h0, shrl_31128[55:3]};
  assign sticky = ~({literal_31087, ~y_fraction__3} | ~sign_ext_31109 | shll_31130[55:3]) != literal_31140;
  assign concat_31147 = {add_31141[53:0], shrl_31128[2:1], shrl_31128[0] | sticky};
  assign xbs_fraction__1 = add_31141[54] ? -concat_31147 : concat_31147;
  assign nor_31160 = ~(xbs_fraction__1[46] | xbs_fraction__1[45]);
  assign nor_31166 = ~(xbs_fraction__1[30] | xbs_fraction__1[29]);
  assign and_31191 = ~(xbs_fraction__1[48] | xbs_fraction__1[47]) & nor_31160;
  assign nor_31193 = ~(xbs_fraction__1[42] | xbs_fraction__1[41]);
  assign carry_bit = xbs_fraction__1[56];
  assign and_31201 = ~(xbs_fraction__1[32] | xbs_fraction__1[31]) & nor_31166;
  assign nor_31203 = ~(xbs_fraction__1[26] | xbs_fraction__1[25]);
  assign and_31242 = ~(xbs_fraction__1[44] | xbs_fraction__1[43]) & nor_31193;
  assign nor_31243 = ~(xbs_fraction__1[44] | xbs_fraction__1[43] | nor_31193);
  assign nor_31245 = ~(xbs_fraction__1[54] | xbs_fraction__1[53]);
  assign and_31252 = ~(xbs_fraction__1[28] | xbs_fraction__1[27]) & nor_31203;
  assign nor_31253 = ~(xbs_fraction__1[28] | xbs_fraction__1[27] | nor_31203);
  assign nor_31255 = ~(xbs_fraction__1[38] | xbs_fraction__1[37]);
  assign nor_31229 = ~(xbs_fraction__1[24] | xbs_fraction__1[23]);
  assign nor_31230 = ~(xbs_fraction__1[22] | xbs_fraction__1[21]);
  assign nor_31235 = ~(xbs_fraction__1[18] | xbs_fraction__1[17]);
  assign nor_31236 = ~(xbs_fraction__1[20] | xbs_fraction__1[19]);
  assign nor_31225 = ~(xbs_fraction__1[14] | xbs_fraction__1[13]);
  assign nor_31226 = ~(xbs_fraction__1[16] | xbs_fraction__1[15]);
  assign nor_31216 = ~(xbs_fraction__1[6] | xbs_fraction__1[5]);
  assign nor_31217 = ~(xbs_fraction__1[8] | xbs_fraction__1[7]);
  assign nor_31286 = ~(xbs_fraction__1[50] | xbs_fraction__1[49]);
  assign nor_31287 = ~(~and_31191 | and_31242);
  assign and_31289 = ~(carry_bit | xbs_fraction__1[55]) & nor_31245;
  assign nor_31290 = ~(carry_bit | xbs_fraction__1[55] | nor_31245);
  assign nor_31297 = ~(xbs_fraction__1[34] | xbs_fraction__1[33]);
  assign nor_31298 = ~(~and_31201 | and_31252);
  assign and_31300 = ~(xbs_fraction__1[40] | xbs_fraction__1[39]) & nor_31255;
  assign nor_31301 = ~(xbs_fraction__1[40] | xbs_fraction__1[39] | nor_31255);
  assign and_31277 = nor_31229 & nor_31230;
  assign nor_31279 = ~(xbs_fraction__1[24] | ~xbs_fraction__1[23]);
  assign and_31282 = nor_31236 & nor_31235;
  assign nor_31283 = ~(xbs_fraction__1[20] | ~xbs_fraction__1[19]);
  assign and_31274 = nor_31226 & nor_31225;
  assign nor_31275 = ~(xbs_fraction__1[16] | ~xbs_fraction__1[15]);
  assign nor_31269 = ~(xbs_fraction__1[10] | xbs_fraction__1[9]);
  assign nor_31271 = ~(xbs_fraction__1[12] | xbs_fraction__1[11]);
  assign and_31265 = nor_31217 & nor_31216;
  assign nor_31266 = ~(xbs_fraction__1[8] | ~xbs_fraction__1[7]);
  assign nor_31260 = ~(xbs_fraction__1[2] | xbs_fraction__1[1]);
  assign nor_31262 = ~(xbs_fraction__1[4] | xbs_fraction__1[3]);
  assign and_31330 = ~(xbs_fraction__1[52] | xbs_fraction__1[51]) & nor_31286;
  assign and_31331 = and_31191 & and_31242;
  assign and_31333 = nor_31287 & ~nor_31243;
  assign and_31334 = nor_31287 & nor_31243;
  assign and_31342 = ~(xbs_fraction__1[36] | xbs_fraction__1[35]) & nor_31297;
  assign and_31343 = and_31201 & and_31252;
  assign and_31345 = nor_31298 & ~nor_31253;
  assign and_31346 = nor_31298 & nor_31253;
  assign and_31366 = and_31289 & and_31330;
  assign nor_31368 = ~(xbs_fraction__1[48] | xbs_fraction__1[47] | nor_31160);
  assign priority_sel_31376 = priority_sel_1b_2way({nor_31290, and_31289}, literal_31087, ~(xbs_fraction__1[54] | ~xbs_fraction__1[53]), ~(carry_bit | ~xbs_fraction__1[55]));
  assign and_31378 = and_31300 & and_31342;
  assign nor_31380 = ~(xbs_fraction__1[32] | xbs_fraction__1[31] | nor_31166);
  assign priority_sel_31388 = priority_sel_1b_2way({nor_31301, and_31300}, literal_31087, ~(xbs_fraction__1[38] | ~xbs_fraction__1[37]), ~(xbs_fraction__1[40] | ~xbs_fraction__1[39]));
  assign and_31363 = and_31277 & and_31282;
  assign priority_sel_31364 = priority_sel_2b_2way({~(xbs_fraction__1[24] | xbs_fraction__1[23] | nor_31230), and_31277}, {nor_31279, literal_31087}, {literal_31099, ~(xbs_fraction__1[22] | ~xbs_fraction__1[21])}, {nor_31229, nor_31279});
  assign and_31359 = nor_31271 & nor_31269;
  assign and_31355 = nor_31262 & nor_31260;
  assign concat_31411 = {literal_31099, ~(xbs_fraction__1[52] | xbs_fraction__1[51] | nor_31286) ? {literal_31099, ~(xbs_fraction__1[50] | ~xbs_fraction__1[49])} : {literal_31087, ~(xbs_fraction__1[52] | ~xbs_fraction__1[51])}};
  assign concat_31423 = {literal_31099, ~(xbs_fraction__1[36] | xbs_fraction__1[35] | nor_31297) ? {literal_31099, ~(xbs_fraction__1[34] | ~xbs_fraction__1[33])} : {literal_31087, ~(xbs_fraction__1[36] | ~xbs_fraction__1[35])}};
  assign concat_31399 = {literal_31099, priority_sel_2b_2way({~(xbs_fraction__1[20] | xbs_fraction__1[19] | nor_31235), and_31282}, {nor_31283, literal_31087}, {literal_31099, ~(xbs_fraction__1[18] | ~xbs_fraction__1[17])}, {nor_31236, nor_31283})};
  assign concat_31396 = {and_31274, priority_sel_2b_2way({~(xbs_fraction__1[16] | xbs_fraction__1[15] | nor_31225), and_31274}, {nor_31275, literal_31087}, {literal_31099, ~(xbs_fraction__1[14] | ~xbs_fraction__1[13])}, {nor_31226, nor_31275})};
  assign concat_31395 = {literal_31099, ~(xbs_fraction__1[12] | xbs_fraction__1[11] | nor_31269) ? {literal_31099, ~(xbs_fraction__1[10] | ~xbs_fraction__1[9])} : {nor_31271, ~(xbs_fraction__1[12] | ~xbs_fraction__1[11])}};
  assign concat_31393 = {and_31265, priority_sel_2b_2way({~(xbs_fraction__1[8] | xbs_fraction__1[7] | nor_31216), and_31265}, {nor_31266, literal_31087}, {literal_31099, ~(xbs_fraction__1[6] | ~xbs_fraction__1[5])}, {nor_31217, nor_31266})};
  assign concat_31392 = {literal_31099, ~(xbs_fraction__1[4] | xbs_fraction__1[3] | nor_31260) ? {literal_31099, ~(xbs_fraction__1[2] | ~xbs_fraction__1[1])} : {nor_31262, ~(xbs_fraction__1[4] | ~xbs_fraction__1[3])}};
  assign and_31432 = and_31366 & and_31331;
  assign and_31438 = and_31378 & and_31343;
  assign and_31429 = and_31274 & and_31359;
  assign fraction_shift__3 = 3'h4;
  assign literal_31450 = 4'h0;
  assign and_31459 = and_31432 & and_31438;
  assign priority_sel_31460 = priority_sel_4b_2way({~(~and_31366 | and_31331), and_31432}, literal_31450, {literal_31099, nor_31287, and_31334 & ~and_31331 | nor_31368 & ~and_31333 & ~and_31334 & ~and_31331, priority_sel_1b_4way({nor_31368, and_31333, and_31334, and_31331}, literal_31087, ~(xbs_fraction__1[42] | ~xbs_fraction__1[41]), ~(xbs_fraction__1[44] | ~xbs_fraction__1[43]), ~(xbs_fraction__1[46] | ~xbs_fraction__1[45]), ~(xbs_fraction__1[48] | ~xbs_fraction__1[47]))}, {and_31366, priority_sel_3b_2way({~(~and_31289 | and_31330), and_31366}, {nor_31290, priority_sel_31376, literal_31087}, concat_31411, {literal_31087, nor_31290, priority_sel_31376})});
  assign priority_sel_31461 = priority_sel_4b_2way({~(~and_31378 | and_31343), and_31438}, literal_31450, {literal_31099, nor_31298, and_31346 & ~and_31343 | nor_31380 & ~and_31345 & ~and_31346 & ~and_31343, priority_sel_1b_4way({nor_31380, and_31345, and_31346, and_31343}, literal_31087, ~(xbs_fraction__1[26] | ~xbs_fraction__1[25]), ~(xbs_fraction__1[28] | ~xbs_fraction__1[27]), ~(xbs_fraction__1[30] | ~xbs_fraction__1[29]), ~(xbs_fraction__1[32] | ~xbs_fraction__1[31]))}, {and_31378, priority_sel_3b_2way({~(~and_31300 | and_31342), and_31378}, {nor_31301, priority_sel_31388, literal_31087}, concat_31423, {literal_31087, nor_31301, priority_sel_31388})});
  assign sel_31573 = ~(~and_31363 | and_31429) ? {literal_31099, ~(~and_31274 | and_31359) ? concat_31395 : concat_31396} : {and_31363, priority_sel_3b_2way({~(~and_31277 | and_31282), and_31363}, {priority_sel_31364, literal_31087}, concat_31399, {and_31277, priority_sel_31364})};
  assign concat_31463 = {literal_31099, and_31265 & and_31355 ? {fraction_shift__3, ~xbs_fraction__1[0]} : {literal_31087, ~(~and_31265 | and_31355) ? concat_31392 : concat_31393}};
  assign leading_zeroes = and_31432 & and_31459 ? {literal_31099, and_31363 & and_31429 ? concat_31463 : {literal_31087, sel_31573}} : {literal_31087, priority_sel_5b_2way({~(~and_31432 | and_31438), and_31459}, {priority_sel_31460, literal_31087}, {literal_31099, priority_sel_31461}, {and_31432, priority_sel_31460})};
  assign cancel_fraction = leading_zeroes >= 6'h3a ? 58'h000_0000_0000_0000 : {literal_31087, xbs_fraction__1} << leading_zeroes;
  assign cancel_fraction__1 = cancel_fraction[56:1];
  assign carry_fraction__1 = {xbs_fraction__1[56:2], xbs_fraction__1[1] | xbs_fraction__1[0]};
  assign shifted_fraction = carry_bit ? carry_fraction__1 : cancel_fraction__1;
  assign normal_chunk = shifted_fraction[2:0];
  assign half_way_chunk = shifted_fraction[3:2];
  assign do_round_up = normal_chunk > fraction_shift__3 | half_way_chunk == 2'h3;
  assign add_31491 = {literal_31087, shifted_fraction[55:3]} + {literal_31140, do_round_up};
  assign rounding_carry = add_31491[53];
  assign add_31504 = {literal_31087, x_bexp__3} + 12'h001;
  assign sub_31505 = {6'h00, rounding_carry} - {literal_31087, leading_zeroes};
  assign fraction_is_zero = add_31141 == 55'h00_0000_0000_0000 & ~(shrl_31128[1] | shrl_31128[2]) & ~(shrl_31128[0] | sticky);
  assign wide_exponent_associative_element = {literal_31087, add_31504};
  assign wide_exponent_associative_element__1 = {{6{sub_31505[6]}}, sub_31505};
  assign wide_exponent = wide_exponent_associative_element + wide_exponent_associative_element__1;
  assign wide_exponent__1 = wide_exponent & {13{~fraction_is_zero}};
  assign MAX_EXPONENT = 11'h7ff;
  assign literal_31518 = 52'h0_0000_0000_0000;
  assign wide_exponent__2 = wide_exponent__1[11:0] & {12{~wide_exponent__1[12]}};
  assign eq_31520 = x_bexp__3 == MAX_EXPONENT;
  assign eq_31521 = x_fraction__1 == literal_31518;
  assign eq_31522 = y_bexp__3 == MAX_EXPONENT;
  assign eq_31523 = y_fraction__3 == literal_31518;
  assign fraction_shift__2 = 3'h3;
  assign is_operand_inf = eq_31520 & eq_31521 | eq_31522 & eq_31523;
  assign and_reduce_31541 = &wide_exponent__2[10:0];
  assign has_pos_inf = ~(~eq_31520 | ~eq_31521 | x_sign__1) | ~(~eq_31522 | ~eq_31523 | y_sign__3);
  assign has_neg_inf = eq_31520 & eq_31521 & x_sign__1 | eq_31522 & eq_31523 & y_sign__3;
  assign rounded_fraction = {add_31491, normal_chunk};
  assign fraction_shift__1 = rounding_carry ? fraction_shift__3 : fraction_shift__2;
  assign shrl_31554 = rounded_fraction >> fraction_shift__1;
  assign is_result_nan = ~(~eq_31520 | eq_31521) | ~(~eq_31522 | eq_31523) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({add_31141[54], fraction_is_zero}, x_sign__1 & y_sign__3, ~y_sign__3, y_sign__3);
  assign result_fraction = shrl_31554[51:0];
  assign sign_ext_31560 = {52{~(is_operand_inf | wide_exponent__2[11] | and_reduce_31541 | ~((|wide_exponent__2[11:1]) | wide_exponent__2[0]))}};
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & sign_ext_31560;
  assign FRACTION_HIGH_BIT = 52'h8_0000_0000_0000;
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exponent__2 = is_result_nan | is_operand_inf | wide_exponent__2[11] | and_reduce_31541 ? MAX_EXPONENT : wide_exponent__2[10:0];
  assign result_fraction__4 = is_result_nan ? FRACTION_HIGH_BIT : result_fraction__3;
  assign out = {result_sign__2, result_exponent__2, result_fraction__4};
endmodule