module __bfloat16__fma(
  input wire [15:0] a,
  input wire [15:0] b,
  input wire [15:0] c,
  output wire [15:0] out
);
  // lint_off MULTIPLY
  function automatic [15:0] umul16b_8b_x_8b (input reg [7:0] lhs, input reg [7:0] rhs);
    begin
      umul16b_8b_x_8b = lhs * rhs;
    end
  endfunction
  // lint_on MULTIPLY
  function automatic priority_sel_1b_2way (input reg [1:0] sel, input reg case0, input reg case1, input reg default_value);
    begin
      casez (sel)
        2'b?1: begin
          priority_sel_1b_2way = case0;
        end
        2'b10: begin
          priority_sel_1b_2way = case1;
        end
        2'b00: begin
          priority_sel_1b_2way = default_value;
        end
        default: begin
          // Propagate X
          priority_sel_1b_2way = 1'dx;
        end
      endcase
    end
  endfunction
  wire [7:0] a_bexp__1;
  wire [7:0] literal_2019;
  wire [7:0] b_bexp__1;
  wire cancel__1;
  wire bnot__1;
  wire [6:0] a_fraction__1;
  wire [6:0] b_fraction__1;
  wire eq_2025;
  wire eq_2026;
  wire [7:0] a_significand__1;
  wire [7:0] b_significand__1;
  wire nor_2031;
  wire [8:0] add_2032;
  wire [15:0] umul_2033;
  wire [7:0] max_exp;
  wire [6:0] literal_2036;
  wire [15:0] full_product;
  wire eq_2040;
  wire eq_2041;
  wire eq_2042;
  wire eq_2043;
  wire [9:0] exp;
  wire [8:0] literal_2046;
  wire in_upper_binade;
  wire [9:0] exp__1;
  wire has_inf_arg;
  wire [9:0] result_exp__3;
  wire [9:0] result_exp__4;
  wire is_subnormal;
  wire has_0_arg;
  wire is_result_nan__1;
  wire [8:0] result_exp__5;
  wire [8:0] literal_2069;
  wire [7:0] c_bexp__2;
  wire [8:0] ab_bexp__2;
  wire [7:0] bnot__2;
  wire [9:0] ab_bexp_extended__1;
  wire [9:0] bnot_extended__2;
  wire [9:0] full_result;
  wire overflow_detected;
  wire nc;
  wire [8:0] narrowed_result;
  wire [8:0] ab_bexpor_mask__2;
  wire [15:0] result_fraction__5;
  wire [8:0] result;
  wire [15:0] result_fraction__6;
  wire [8:0] exp_difference;
  wire [15:0] result_fraction__7;
  wire [24:0] literal_2096;
  wire [8:0] rshift_ab;
  wire [6:0] c_fraction__2;
  wire [8:0] rshift_c;
  wire [15:0] ab_fraction__2;
  wire [24:0] shll_2102;
  wire [7:0] sign_ext_2104;
  wire [24:0] shll_2105;
  wire a_sign__1;
  wire b_sign__1;
  wire [15:0] literal_2115;
  wire [7:0] wide_c__3;
  wire result_sign__3;
  wire [24:0] wide_ab;
  wire [23:0] literal_2121;
  wire [24:0] wide_c__2;
  wire [24:0] shifted_ab;
  wire [24:0] sticky_ab;
  wire [24:0] shifted_c;
  wire [24:0] sticky_c;
  wire c_sign__2;
  wire ab_sign__2;
  wire greater_sign;
  wire [25:0] shifted_ab__1_squeezed;
  wire [25:0] shifted_c__1_squeezed;
  wire [25:0] shifted_ab__2_squeezed;
  wire [25:0] shifted_c__2_squeezed;
  wire [26:0] shifted_ab__2;
  wire [26:0] shifted_c__2;
  wire [26:0] sum_fraction;
  wire [25:0] abs_fraction__2;
  wire [25:0] reverse_2150;
  wire [26:0] one_hot_2151;
  wire [4:0] encode_2152;
  wire cancel__2;
  wire carry_bit__2;
  wire [5:0] concat_2156;
  wire [5:0] add_2161;
  wire [24:0] carry_fraction__1;
  wire [2:0] concat_2169;
  wire [24:0] carry_fraction__4;
  wire [24:0] cancel_fraction__2;
  wire [24:0] shifted_fraction;
  wire [16:0] normal_chunk;
  wire [16:0] half_of_extra;
  wire [1:0] half_way_chunk;
  wire [8:0] concat_2181;
  wire [8:0] add_2184;
  wire [8:0] rounded_fraction__1;
  wire [8:0] greater_exp;
  wire rounding_carry;
  wire [5:0] sub_2191;
  wire fraction_is_zero;
  wire [9:0] bexp_associative_element__1;
  wire [9:0] bexp_associative_element__4;
  wire [9:0] bexp__1;
  wire [9:0] bexp__2;
  wire eq_2205;
  wire eq_2206;
  wire eq_2207;
  wire eq_2208;
  wire [8:0] bexp__6;
  wire and_2213;
  wire is_operand_inf;
  wire and_reduce_2222;
  wire has_pos_inf;
  wire has_neg_inf;
  wire is_result_nan;
  wire result_sign;
  wire [6:0] result_fraction;
  wire result_sign__1;
  wire [6:0] result_fraction__3;
  wire [3:0] one_hot_2252;
  wire result_sign__2;
  wire [7:0] result_exp__2;
  wire [6:0] result_fraction__4;
  assign a_bexp__1 = a[14:7];
  assign literal_2019 = 8'h00;
  assign b_bexp__1 = b[14:7];
  assign cancel__1 = 1'h0;
  assign bnot__1 = 1'h1;
  assign a_fraction__1 = a[6:0];
  assign b_fraction__1 = b[6:0];
  assign eq_2025 = a_bexp__1 == literal_2019;
  assign eq_2026 = b_bexp__1 == literal_2019;
  assign a_significand__1 = {bnot__1, a_fraction__1};
  assign b_significand__1 = {bnot__1, b_fraction__1};
  assign nor_2031 = ~(eq_2025 | eq_2026);
  assign add_2032 = {cancel__1, a_bexp__1} + {cancel__1, b_bexp__1};
  assign umul_2033 = umul16b_8b_x_8b(a_significand__1, b_significand__1);
  assign max_exp = 8'hff;
  assign literal_2036 = 7'h00;
  assign full_product = umul_2033 & {16{nor_2031}};
  assign eq_2040 = a_bexp__1 == max_exp;
  assign eq_2041 = a_fraction__1 == literal_2036;
  assign eq_2042 = b_bexp__1 == max_exp;
  assign eq_2043 = b_fraction__1 == literal_2036;
  assign exp = {cancel__1, add_2032} + 10'h381;
  assign literal_2046 = 9'h000;
  assign in_upper_binade = full_product[15];
  assign exp__1 = exp & {10{nor_2031}};
  assign has_inf_arg = eq_2040 & eq_2041 | eq_2042 & eq_2043;
  assign result_exp__3 = exp__1 + {literal_2046, in_upper_binade};
  assign result_exp__4 = has_inf_arg ? 10'h1ff : result_exp__3;
  assign is_subnormal = $signed(result_exp__4) <= $signed(10'h000);
  assign has_0_arg = eq_2025 | eq_2026;
  assign is_result_nan__1 = ~(~eq_2040 | eq_2041) | ~(~eq_2042 | eq_2043) | has_0_arg & has_inf_arg;
  assign result_exp__5 = result_exp__4[8:0] & {9{~is_subnormal}};
  assign literal_2069 = 9'h1ff;
  assign c_bexp__2 = c[14:7];
  assign ab_bexp__2 = is_result_nan__1 ? literal_2069 : result_exp__5;
  assign bnot__2 = ~c_bexp__2;
  assign ab_bexp_extended__1 = {cancel__1, ab_bexp__2};
  assign bnot_extended__2 = {2'h1, bnot__2};
  assign full_result = ab_bexp_extended__1 + bnot_extended__2;
  assign overflow_detected = full_result[9];
  assign nc = ~overflow_detected;
  assign narrowed_result = full_result[8:0];
  assign ab_bexpor_mask__2 = {9{nc}};
  assign result_fraction__5 = in_upper_binade ? umul_2033 : {full_product[14:0], cancel__1};
  assign result = narrowed_result ^ ab_bexpor_mask__2;
  assign result_fraction__6 = result_fraction__5 & {16{~has_inf_arg}};
  assign exp_difference = result + {literal_2019, overflow_detected};
  assign result_fraction__7 = (-result_exp__4[8:0] & {9{is_subnormal}}) >= 9'h010 ? 16'h0000 : result_fraction__6 >> (-result_exp__4[8:0] & {9{is_subnormal}});
  assign literal_2096 = 25'h1ff_ffff;
  assign rshift_ab = exp_difference & ab_bexpor_mask__2;
  assign c_fraction__2 = c[6:0];
  assign rshift_c = exp_difference & {9{overflow_detected}};
  assign ab_fraction__2 = is_result_nan__1 ? 16'hc000 : result_fraction__7;
  assign shll_2102 = rshift_ab >= 9'h019 ? 25'h000_0000 : literal_2096 << rshift_ab;
  assign sign_ext_2104 = {8{c_bexp__2 != literal_2019}};
  assign shll_2105 = rshift_c >= 9'h019 ? 25'h000_0000 : literal_2096 << rshift_c;
  assign a_sign__1 = a[15:15];
  assign b_sign__1 = b[15:15];
  assign literal_2115 = 16'h0000;
  assign wide_c__3 = {bnot__1, c_fraction__2} & sign_ext_2104;
  assign result_sign__3 = a_sign__1 ^ b_sign__1;
  assign wide_ab = {ab_fraction__2, literal_2046};
  assign literal_2121 = 24'h00_0000;
  assign wide_c__2 = {wide_c__3, 17'h0_0000};
  assign shifted_ab = rshift_ab >= 9'h019 ? 25'h000_0000 : wide_ab >> rshift_ab;
  assign sticky_ab = {literal_2121, ~(~ab_fraction__2 | shll_2102[24:9]) != literal_2115};
  assign shifted_c = rshift_c >= 9'h019 ? 25'h000_0000 : wide_c__2 >> rshift_c;
  assign sticky_c = {literal_2121, ~({cancel__1, ~c_fraction__2} | ~sign_ext_2104 | shll_2105[24:17]) != literal_2019};
  assign c_sign__2 = c[15:15];
  assign ab_sign__2 = ~(is_result_nan__1 | ~result_sign__3);
  assign greater_sign = overflow_detected ? ab_sign__2 : c_sign__2;
  assign shifted_ab__1_squeezed = {cancel__1, shifted_ab | sticky_ab};
  assign shifted_c__1_squeezed = {cancel__1, shifted_c | sticky_c};
  assign shifted_ab__2_squeezed = ab_sign__2 ^ greater_sign ? -shifted_ab__1_squeezed : shifted_ab__1_squeezed;
  assign shifted_c__2_squeezed = c_sign__2 ^ greater_sign ? -shifted_c__1_squeezed : shifted_c__1_squeezed;
  assign shifted_ab__2 = {{1{shifted_ab__2_squeezed[25]}}, shifted_ab__2_squeezed};
  assign shifted_c__2 = {{1{shifted_c__2_squeezed[25]}}, shifted_c__2_squeezed};
  assign sum_fraction = shifted_ab__2 + shifted_c__2;
  assign abs_fraction__2 = sum_fraction[26] ? -sum_fraction[25:0] : sum_fraction[25:0];
  assign reverse_2150 = {abs_fraction__2[0], abs_fraction__2[1], abs_fraction__2[2], abs_fraction__2[3], abs_fraction__2[4], abs_fraction__2[5], abs_fraction__2[6], abs_fraction__2[7], abs_fraction__2[8], abs_fraction__2[9], abs_fraction__2[10], abs_fraction__2[11], abs_fraction__2[12], abs_fraction__2[13], abs_fraction__2[14], abs_fraction__2[15], abs_fraction__2[16], abs_fraction__2[17], abs_fraction__2[18], abs_fraction__2[19], abs_fraction__2[20], abs_fraction__2[21], abs_fraction__2[22], abs_fraction__2[23], abs_fraction__2[24], abs_fraction__2[25]};
  assign one_hot_2151 = {reverse_2150[25:0] == 26'h000_0000, reverse_2150[25] && reverse_2150[24:0] == 25'h000_0000, reverse_2150[24] && reverse_2150[23:0] == 24'h00_0000, reverse_2150[23] && reverse_2150[22:0] == 23'h00_0000, reverse_2150[22] && reverse_2150[21:0] == 22'h00_0000, reverse_2150[21] && reverse_2150[20:0] == 21'h00_0000, reverse_2150[20] && reverse_2150[19:0] == 20'h0_0000, reverse_2150[19] && reverse_2150[18:0] == 19'h0_0000, reverse_2150[18] && reverse_2150[17:0] == 18'h0_0000, reverse_2150[17] && reverse_2150[16:0] == 17'h0_0000, reverse_2150[16] && reverse_2150[15:0] == 16'h0000, reverse_2150[15] && reverse_2150[14:0] == 15'h0000, reverse_2150[14] && reverse_2150[13:0] == 14'h0000, reverse_2150[13] && reverse_2150[12:0] == 13'h0000, reverse_2150[12] && reverse_2150[11:0] == 12'h000, reverse_2150[11] && reverse_2150[10:0] == 11'h000, reverse_2150[10] && reverse_2150[9:0] == 10'h000, reverse_2150[9] && reverse_2150[8:0] == 9'h000, reverse_2150[8] && reverse_2150[7:0] == 8'h00, reverse_2150[7] && reverse_2150[6:0] == 7'h00, reverse_2150[6] && reverse_2150[5:0] == 6'h00, reverse_2150[5] && reverse_2150[4:0] == 5'h00, reverse_2150[4] && reverse_2150[3:0] == 4'h0, reverse_2150[3] && reverse_2150[2:0] == 3'h0, reverse_2150[2] && reverse_2150[1:0] == 2'h0, reverse_2150[1] && !reverse_2150[0], reverse_2150[0]};
  assign encode_2152 = {one_hot_2151[16] | one_hot_2151[17] | one_hot_2151[18] | one_hot_2151[19] | one_hot_2151[20] | one_hot_2151[21] | one_hot_2151[22] | one_hot_2151[23] | one_hot_2151[24] | one_hot_2151[25] | one_hot_2151[26], one_hot_2151[8] | one_hot_2151[9] | one_hot_2151[10] | one_hot_2151[11] | one_hot_2151[12] | one_hot_2151[13] | one_hot_2151[14] | one_hot_2151[15] | one_hot_2151[24] | one_hot_2151[25] | one_hot_2151[26], one_hot_2151[4] | one_hot_2151[5] | one_hot_2151[6] | one_hot_2151[7] | one_hot_2151[12] | one_hot_2151[13] | one_hot_2151[14] | one_hot_2151[15] | one_hot_2151[20] | one_hot_2151[21] | one_hot_2151[22] | one_hot_2151[23], one_hot_2151[2] | one_hot_2151[3] | one_hot_2151[6] | one_hot_2151[7] | one_hot_2151[10] | one_hot_2151[11] | one_hot_2151[14] | one_hot_2151[15] | one_hot_2151[18] | one_hot_2151[19] | one_hot_2151[22] | one_hot_2151[23] | one_hot_2151[26], one_hot_2151[1] | one_hot_2151[3] | one_hot_2151[5] | one_hot_2151[7] | one_hot_2151[9] | one_hot_2151[11] | one_hot_2151[13] | one_hot_2151[15] | one_hot_2151[17] | one_hot_2151[19] | one_hot_2151[21] | one_hot_2151[23] | one_hot_2151[25]};
  assign cancel__2 = |encode_2152[4:1];
  assign carry_bit__2 = abs_fraction__2[25];
  assign concat_2156 = {cancel__1, encode_2152};
  assign add_2161 = concat_2156 + 6'h3f;
  assign carry_fraction__1 = abs_fraction__2[25:1];
  assign concat_2169 = {~(carry_bit__2 | cancel__2), ~(carry_bit__2 | ~cancel__2), ~(~carry_bit__2 | cancel__2)};
  assign carry_fraction__4 = carry_fraction__1 | {literal_2121, abs_fraction__2[0]};
  assign cancel_fraction__2 = {{20{add_2161[5]}}, add_2161} >= 26'h000_0019 ? 25'h000_0000 : abs_fraction__2[24:0] << {{20{add_2161[5]}}, add_2161};
  assign shifted_fraction = carry_fraction__4 & {25{concat_2169[0]}} | cancel_fraction__2 & {25{concat_2169[1]}} | abs_fraction__2[24:0] & {25{concat_2169[2]}};
  assign normal_chunk = shifted_fraction[16:0];
  assign half_of_extra = 17'h1_0000;
  assign half_way_chunk = shifted_fraction[17:16];
  assign concat_2181 = {cancel__1, shifted_fraction[24:17]};
  assign add_2184 = concat_2181 + 9'h001;
  assign rounded_fraction__1 = normal_chunk > half_of_extra | half_way_chunk == 2'h3 ? add_2184 : concat_2181;
  assign greater_exp = overflow_detected ? ab_bexp__2 : {cancel__1, c_bexp__2};
  assign rounding_carry = rounded_fraction__1[8];
  assign sub_2191 = 6'h01 - concat_2156;
  assign fraction_is_zero = sum_fraction == 27'h000_0000;
  assign bexp_associative_element__1 = {{4{sub_2191[5]}}, sub_2191};
  assign bexp_associative_element__4 = {cancel__1, greater_exp} + {literal_2046, rounding_carry};
  assign bexp__1 = bexp_associative_element__1 + bexp_associative_element__4;
  assign bexp__2 = bexp__1 & {10{~fraction_is_zero}};
  assign eq_2205 = ab_bexp__2 == literal_2069;
  assign eq_2206 = ab_fraction__2 == literal_2115;
  assign eq_2207 = c_bexp__2 == max_exp;
  assign eq_2208 = c_fraction__2 == literal_2036;
  assign bexp__6 = bexp__2[8:0] & {9{~bexp__2[9]}};
  assign and_2213 = eq_2205 & eq_2206;
  assign is_operand_inf = and_2213 | eq_2207 & eq_2208;
  assign and_reduce_2222 = &bexp__6[7:0];
  assign has_pos_inf = ~(~(eq_2205 & eq_2206) | ab_sign__2) | ~(~eq_2207 | ~eq_2208 | c_sign__2);
  assign has_neg_inf = and_2213 & ab_sign__2 | eq_2207 & eq_2208 & c_sign__2;
  assign is_result_nan = ~(~eq_2205 | eq_2206) | ~(~eq_2207 | eq_2208) | has_pos_inf & has_neg_inf;
  assign result_sign = priority_sel_1b_2way({sum_fraction[26], fraction_is_zero}, cancel__1, ~greater_sign, greater_sign);
  assign result_fraction = rounded_fraction__1[6:0];
  assign result_sign__1 = is_operand_inf ? ~has_pos_inf : result_sign;
  assign result_fraction__3 = result_fraction & {7{~(is_operand_inf | bexp__6[8] | and_reduce_2222 | bexp__6 == literal_2046)}};
  assign one_hot_2252 = {concat_2169[2:0] == 3'h0, concat_2169[2] && concat_2169[1:0] == 2'h0, concat_2169[1] && !concat_2169[0], concat_2169[0]};
  assign result_sign__2 = ~is_result_nan & result_sign__1;
  assign result_exp__2 = is_result_nan | is_operand_inf | bexp__6[8] | and_reduce_2222 ? max_exp : bexp__6[7:0];
  assign result_fraction__4 = is_result_nan ? 7'h08 : result_fraction__3;
  assign out = {result_sign__2, result_exp__2, result_fraction__4};
endmodule