module __float32__to_uint32(
  input wire [31:0] x,
  output wire [31:0] out
);
  wire [7:0] x_bexp__2;
  wire [7:0] exp;
  wire [8:0] add_427;
  wire [22:0] x_fraction__2;
  wire [8:0] neg_432;
  wire [31:0] effective_exp;
  wire [23:0] fraction_shift_bits;
  wire eq_440;
  wire ne_441;
  wire [31:0] fraction;
  wire [31:0] sel_456;
  wire x_sign__2;
  wire exp_oob;
  wire [31:0] result;
  assign x_bexp__2 = x[30:23];
  assign exp = x_bexp__2 + 8'h81;
  assign add_427 = {{1{exp[7]}}, exp} + 9'h1e9;
  assign x_fraction__2 = x[22:0];
  assign neg_432 = -add_427;
  assign effective_exp = {{23{add_427[8]}}, add_427};
  assign fraction_shift_bits = {1'h1, x_fraction__2};
  assign eq_440 = x_bexp__2 == 8'hff;
  assign ne_441 = x_fraction__2 != 23'h00_0000;
  assign fraction = {9'h001, x_fraction__2};
  assign sel_456 = effective_exp[31] ? {8'h00, {{23{neg_432[8]}}, neg_432} >= 32'h0000_0018 ? 24'h00_0000 : fraction_shift_bits >> {{23{neg_432[8]}}, neg_432}} : ((effective_exp & {32{$signed(add_427) > $signed(9'h000)}}) >= 32'h0000_0020 ? 32'h0000_0000 : fraction << (effective_exp & {32{$signed(add_427) > $signed(9'h000)}}));
  assign x_sign__2 = x[31:31];
  assign exp_oob = $signed(exp) >= $signed(8'h20);
  assign result = exp_oob | ~(~eq_440 | ne_441) | x_sign__2 ? {32{~x_sign__2}} : (x_bexp__2 == 8'h7f ? 32'h0000_0001 : sel_456) & {32{~(eq_440 & ne_441 | exp[7])}};
  assign out = result;
endmodule